Angelo Jacobo c5d387fa24 added reset sequence and formal assertions ... - completed (mostly) the reset sequence - added formal assertions and cover statements for reset sequence logic - moved all parameters to this file - fixed port widths - converted IO ports to ANSI		2023-03-09 18:06:53 +08:00
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ddr3_controller.v	added reset sequence and formal assertions	2023-03-09 18:06:53 +08:00