UberDDR3/example_demo/qmtech_wukong
AngeloJacobo b38d9801ba run @ 100MHz with yosys 2025-12-31 14:37:32 +08:00
..
Makefile added vivado on makefile (make vivado) 2025-05-12 16:02:38 +08:00
clk_wiz.v run @ 100MHz with yosys 2025-12-31 14:37:32 +08:00
uart_rx.v add makefile for openxc7 (WORKING) 2024-10-13 16:43:22 +08:00
uart_tx.v add makefile for openxc7 (WORKING) 2024-10-13 16:43:22 +08:00
wukong_ddr3.v run @ 100MHz with yosys 2025-12-31 14:37:32 +08:00
wukong_ddr3.xdc add makefile for openxc7 (WORKING) 2024-10-13 16:43:22 +08:00
wukong_ddr3_openxc7.bit run @ 100MHz with yosys 2025-12-31 14:37:32 +08:00
wukong_ddr3_vivado.xdc added vivado on makefile (make vivado) 2025-05-12 16:02:38 +08:00