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luke
/
UberDDR3
mirror of
https://github.com/AngeloJacobo/UberDDR3.git
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6f5eb49e79
UberDDR3
/
example_demo
/
arty_s7
History
AngeloJacobo
9b99dbfe77
add ECC parameters
2024-07-28 17:30:35 +08:00
..
Arty-S7-50-Master.xdc
clean repo
2024-06-09 11:31:58 +08:00
arty_ddr3.bit
add bit files for example demo
2024-06-10 16:44:41 +08:00
arty_ddr3.v
add ECC parameters
2024-07-28 17:30:35 +08:00
clk_wiz.v
replace clock wizard with PLL
2024-06-09 15:31:27 +08:00
uart.v
clean repo
2024-06-09 11:31:58 +08:00
uart_rx.v
clean repo
2024-06-09 11:31:58 +08:00
uart_tx.v
clean repo
2024-06-09 11:31:58 +08:00