UberDDR3/rtl
AngeloJacobo c7ec0a54fc set default BIST_MODE to 1 for shorter bring up 2025-04-19 13:37:58 +08:00
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axi update UberDDR3 AXI for Vivado custom IP 2025-02-16 14:53:05 +08:00
ecc Revert "add self-refresh option, passing Simulation, ongoing formal" 2024-11-23 11:43:05 +08:00
ecp5_phy added support for DLL_OFF and Lattice ECP5 PHY 2025-04-19 13:24:20 +08:00
spd added simulation and project demo with XADC 2025-01-12 14:55:43 +08:00
ddr3_controller.v added support for DLL_OFF and Lattice ECP5 PHY 2025-04-19 13:24:20 +08:00
ddr3_phy.v revert changes in shiftin and iodelay_group string name since openxc7 now works on them 2025-03-16 12:29:48 +08:00
ddr3_top.v set default BIST_MODE to 1 for shorter bring up 2025-04-19 13:37:58 +08:00