14 lines
768 B
Plaintext
14 lines
768 B
Plaintext
verilog xil_defaultlib --include "/home/ajacobo/Desktop/UberDDR3/testbench" --include "/home/ajacobo/Desktop/enclustra_vivado/enclustra_vivado.gen/sources_1/ip/clk_wiz_0" \
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"/home/ajacobo/Desktop/UberDDR3/rtl/ddr3_controller.v" \
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"/home/ajacobo/Desktop/UberDDR3/rtl/ddr3_phy.v" \
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"/home/ajacobo/Desktop/UberDDR3/rtl/ddr3_top.v" \
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sv xil_defaultlib --include "/home/ajacobo/Desktop/UberDDR3/testbench" --include "/home/ajacobo/Desktop/enclustra_vivado/enclustra_vivado.gen/sources_1/ip/clk_wiz_0" \
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"/home/ajacobo/Desktop/UberDDR3/testbench/ddr3.sv" \
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"/home/ajacobo/Desktop/UberDDR3/testbench/ddr3_module.sv" \
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"/home/ajacobo/Desktop/UberDDR3/testbench/ddr3_dimm_micron_sim.sv" \
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verilog xil_defaultlib "/home/ajacobo/Desktop/UberDDR3/testbench/xsim/glbl.v"
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nosort
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