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update UberDDR3 AXI for Vivado custom IP

This commit is contained in:
AngeloJacobo 2025-02-16 14:53:05 +08:00
parent 48fd64588b
commit d6f50b3a6a
3 changed files with 48 additions and 42 deletions
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4
rtl/axi/ddr3_top_axi.v
View File

@ -45,7 +45,7 @@ module ddr3_top_axi #(
ODELAY_SUPPORTED = 0, //set to 1 when ODELAYE2 is supported
SECOND_WISHBONE = 0, //set to 1 if 2nd wishbone for debugging is needed
WB_ERROR = 0, // set to 1 to support Wishbone error (asserts at ECC double bit error)
SKIP_INTERNAL_TEST = 0, // skip built-in self test (would require >2 seconds of internal test right after calibration)
parameter[1:0] BIST_MODE = 2, // 0 = No BIST, 1 = run through all address space ONCE , 2 = run through all address space for every test (burst w/r, random w/r, alternating r/w)
parameter[1:0] ECC_ENABLE = 0, // set to 1 or 2 to add ECC (1 = Side-band ECC per burst, 2 = Side-band ECC per 8 bursts , 3 = Inline ECC )
parameter[1:0] DIC = 2'b00, //Output Driver Impedance Control (2'b00 = RZQ/6, 2'b01 = RZQ/7, RZQ = 240ohms) (only change when you know what you are doing)
parameter[2:0] RTT_NOM = 3'b011, //RTT Nominal (3'b000 = disabled, 3'b001 = RZQ/4, 3'b010 = RZQ/2 , 3'b011 = RZQ/6, RZQ = 240ohms) (only change when you know what you are doing)
@ -166,7 +166,7 @@ ddr3_top #(
.WB2_ADDR_BITS(WB2_ADDR_BITS), //width of 2nd wishbone address bus
.WB2_DATA_BITS(WB2_DATA_BITS), //width of 2nd wishbone data bus
.WB_ERROR(WB_ERROR), // set to 1 to support Wishbone error (asserts at ECC double bit error)
.SKIP_INTERNAL_TEST(SKIP_INTERNAL_TEST), // skip built-in self test (would require >2 seconds of internal test right after calibration)
.BIST_MODE(BIST_MODE), // 0 = No BIST, 1 = run through all address space ONCE , 2 = run through all address space for every test (burst w/r, random w/r, alternating r/w)
.ECC_ENABLE(ECC_ENABLE), // set to 1 or 2 to add ECC (1 = Side-band ECC per burst, 2 = Side-band ECC per 8 bursts , 3 = Inline ECC )
.DIC(DIC), // Output Driver Impedance Control (2'b00 = RZQ/6, 2'b01 = RZQ/7, RZQ = 240ohms) (only change when you know what you are doing)
.RTT_NOM(RTT_NOM), //RTT Nominal (3'b000 = disabled, 3'b001 = RZQ/4, 3'b010 = RZQ/2 , 3'b011 = RZQ/6, RZQ = 240ohms) (only change when you know what you are doing)

54
vivado_custom_ip/component.xml
View File

@ -561,7 +561,7 @@
<spirit:parameters>
<spirit:parameter>
<spirit:name>viewChecksum</spirit:name>
<spirit:value>1dea7b87</spirit:value>
<spirit:value>407441e6</spirit:value>
</spirit:parameter>
</spirit:parameters>
</spirit:view>
@ -577,7 +577,7 @@
<spirit:parameters>
<spirit:parameter>
<spirit:name>viewChecksum</spirit:name>
<spirit:value>1dea7b87</spirit:value>
<spirit:value>407441e6</spirit:value>
</spirit:parameter>
</spirit:parameters>
</spirit:view>
@ -591,7 +591,7 @@
<spirit:parameters>
<spirit:parameter>
<spirit:name>viewChecksum</spirit:name>
<spirit:value>ce7b9cf6</spirit:value>
<spirit:value>5c3337af</spirit:value>
</spirit:parameter>
</spirit:parameters>
</spirit:view>
@ -1596,7 +1596,7 @@
<spirit:vendorExtensions>
<xilinx:portInfo>
<xilinx:enablement>
<xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.i_user_self_refresh" xilinx:dependency="$SELF_REFRESH = 0">true</xilinx:isEnabled>
<xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.i_user_self_refresh" xilinx:dependency="$SELF_REFRESH = 0">false</xilinx:isEnabled>
</xilinx:enablement>
</xilinx:portInfo>
</spirit:vendorExtensions>
@ -1668,11 +1668,6 @@
<spirit:displayName>Wb Error</spirit:displayName>
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.WB_ERROR">0</spirit:value>
</spirit:modelParameter>
<spirit:modelParameter spirit:dataType="integer">
<spirit:name>SKIP_INTERNAL_TEST</spirit:name>
<spirit:displayName>Skip Internal Test</spirit:displayName>
<spirit:value spirit:format="bool" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.SKIP_INTERNAL_TEST">false</spirit:value>
</spirit:modelParameter>
<spirit:modelParameter spirit:dataType="integer">
<spirit:name>ECC_ENABLE</spirit:name>
<spirit:displayName>Ecc Enable</spirit:displayName>
@ -1681,7 +1676,7 @@
<spirit:modelParameter spirit:dataType="integer">
<spirit:name>SELF_REFRESH</spirit:name>
<spirit:displayName>Self-Refresh</spirit:displayName>
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.SELF_REFRESH">0</spirit:value>
<spirit:value spirit:format="bitString" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.SELF_REFRESH" spirit:bitStringLength="2">&quot;00&quot;</spirit:value>
</spirit:modelParameter>
<spirit:modelParameter spirit:dataType="integer">
<spirit:name>DIC</spirit:name>
@ -1743,6 +1738,11 @@
<spirit:displayName>Axi Data Width</spirit:displayName>
<spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.AXI_DATA_WIDTH" spirit:dependency="spirit:decode(id(&apos;MODELPARAM_VALUE.wb_data_bits&apos;))">128</spirit:value>
</spirit:modelParameter>
<spirit:modelParameter spirit:dataType="integer">
<spirit:name>BIST_MODE</spirit:name>
<spirit:displayName>Bist Mode</spirit:displayName>
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.BIST_MODE">0</spirit:value>
</spirit:modelParameter>
</spirit:modelParameters>
</spirit:model>
<spirit:choices>
@ -1751,6 +1751,12 @@
<spirit:enumeration>ACTIVE_HIGH</spirit:enumeration>
<spirit:enumeration>ACTIVE_LOW</spirit:enumeration>
</spirit:choice>
<spirit:choice>
<spirit:name>choice_pairs_3f983004</spirit:name>
<spirit:enumeration spirit:text="0 (No BIST)">0</spirit:enumeration>
<spirit:enumeration spirit:text="1 (Run through all address space once)">1</spirit:enumeration>
<spirit:enumeration spirit:text="2 (Run through all address space for every test)">2</spirit:enumeration>
</spirit:choice>
<spirit:choice>
<spirit:name>choice_pairs_933dc0fc</spirit:name>
<spirit:enumeration spirit:text="0 (ECC DIsabled)">0</spirit:enumeration>
@ -1820,7 +1826,7 @@
<spirit:file>
<spirit:name>../rtl/axi/ddr3_top_axi.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
<spirit:userFileType>CHECKSUM_f4e2d855</spirit:userFileType>
<spirit:userFileType>CHECKSUM_f9ca4d9d</spirit:userFileType>
</spirit:file>
</spirit:fileSet>
<spirit:fileSet>
@ -1883,7 +1889,7 @@
<spirit:file>
<spirit:name>xgui/uberddr3_axi_v1_0.tcl</spirit:name>
<spirit:fileType>tclSource</spirit:fileType>
<spirit:userFileType>CHECKSUM_ce7b9cf6</spirit:userFileType>
<spirit:userFileType>CHECKSUM_5c3337af</spirit:userFileType>
<spirit:userFileType>XGUI_VERSION_2</spirit:userFileType>
</spirit:file>
</spirit:fileSet>
@ -1969,11 +1975,6 @@
<spirit:displayName>Wb Error</spirit:displayName>
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.WB_ERROR">0</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>SKIP_INTERNAL_TEST</spirit:name>
<spirit:displayName>Skip Internal Test</spirit:displayName>
<spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.SKIP_INTERNAL_TEST">false</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>ECC_ENABLE</spirit:name>
<spirit:displayName>ECC Enable</spirit:displayName>
@ -2102,7 +2103,12 @@
<spirit:parameter>
<spirit:name>SELF_REFRESH</spirit:name>
<spirit:displayName>Self-Refresh</spirit:displayName>
<spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.SELF_REFRESH" spirit:choiceRef="choice_pairs_96a879b9">0</spirit:value>
<spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.SELF_REFRESH" spirit:choiceRef="choice_pairs_96a879b9" spirit:bitStringLength="2">&quot;00&quot;</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>BIST_MODE</spirit:name>
<spirit:displayName>BIST Mode</spirit:displayName>
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.BIST_MODE" spirit:choiceRef="choice_pairs_3f983004">0</spirit:value>
</spirit:parameter>
</spirit:parameters>
<spirit:vendorExtensions>
@ -2137,8 +2143,8 @@
<xilinx:displayName>uberddr3_axi_v1_0</xilinx:displayName>
<xilinx:definitionSource>package_project</xilinx:definitionSource>
<xilinx:vendorURL>https://github.com/AngeloJacobo/UberDDR3</xilinx:vendorURL>
<xilinx:coreRevision>11</xilinx:coreRevision>
<xilinx:coreCreationDateTime>2024-11-24T08:00:34Z</xilinx:coreCreationDateTime>
<xilinx:coreRevision>12</xilinx:coreRevision>
<xilinx:coreCreationDateTime>2025-02-16T03:52:36Z</xilinx:coreCreationDateTime>
<xilinx:tags>
<xilinx:tag xilinx:name="nopcore"/>
</xilinx:tags>
@ -2147,10 +2153,10 @@
<xilinx:xilinxVersion>2022.1</xilinx:xilinxVersion>
<xilinx:checksum xilinx:scope="busInterfaces" xilinx:value="6c0c2bc0"/>
<xilinx:checksum xilinx:scope="memoryMaps" xilinx:value="cd65c31e"/>
<xilinx:checksum xilinx:scope="fileGroups" xilinx:value="ba5aba03"/>
<xilinx:checksum xilinx:scope="ports" xilinx:value="abd96048"/>
<xilinx:checksum xilinx:scope="hdlParameters" xilinx:value="86f21185"/>
<xilinx:checksum xilinx:scope="parameters" xilinx:value="5574e240"/>
<xilinx:checksum xilinx:scope="fileGroups" xilinx:value="de319895"/>
<xilinx:checksum xilinx:scope="ports" xilinx:value="4c100aa3"/>
<xilinx:checksum xilinx:scope="hdlParameters" xilinx:value="a0261d6d"/>
<xilinx:checksum xilinx:scope="parameters" xilinx:value="ab77e269"/>
</xilinx:packagingInfo>
</spirit:vendorExtensions>
</spirit:component>

32
vivado_custom_ip/xgui/uberddr3_axi_v1_0.tcl
View File

@ -23,8 +23,8 @@ proc init_gui { IPINST } {
set_property tooltip {Type of ECC (0,1,2,3)} ${ECC_ENABLE}
set SELF_REFRESH [ipgui::add_param $IPINST -name "SELF_REFRESH" -parent ${Page_0} -widget comboBox]
set_property tooltip {Enable option for self-refresh} ${SELF_REFRESH}
set SKIP_INTERNAL_TEST [ipgui::add_param $IPINST -name "SKIP_INTERNAL_TEST" -parent ${Page_0}]
set_property tooltip {Check to skip built-in self-test (check this if UberDDR3 will be connected to Microblaze)} ${SKIP_INTERNAL_TEST}
set BIST_MODE [ipgui::add_param $IPINST -name "BIST_MODE" -parent ${Page_0} -widget comboBox]
set_property tooltip {Type of Built-In Self Test (BIST)} ${BIST_MODE}
set ODELAY_SUPPORTED [ipgui::add_param $IPINST -name "ODELAY_SUPPORTED" -parent ${Page_0}]
set_property tooltip {Check if FPGA supports ODELAYE2 primitive (e.g. FPGA with HP banks like Kintex-7)} ${ODELAY_SUPPORTED}
set MICRON_SIM [ipgui::add_param $IPINST -name "MICRON_SIM" -parent ${Page_0}]
@ -187,6 +187,15 @@ proc validate_PARAM_VALUE.BA_BITS { PARAM_VALUE.BA_BITS } {
return true
}
proc update_PARAM_VALUE.BIST_MODE { PARAM_VALUE.BIST_MODE } {
# Procedure called to update BIST_MODE when any of the dependent parameters in the arguments change
}
proc validate_PARAM_VALUE.BIST_MODE { PARAM_VALUE.BIST_MODE } {
# Procedure called to validate BIST_MODE
return true
}
proc update_PARAM_VALUE.BYTE_LANES { PARAM_VALUE.BYTE_LANES } {
# Procedure called to update BYTE_LANES when any of the dependent parameters in the arguments change
}
@ -295,15 +304,6 @@ proc validate_PARAM_VALUE.SELF_REFRESH { PARAM_VALUE.SELF_REFRESH } {
return true
}
proc update_PARAM_VALUE.SKIP_INTERNAL_TEST { PARAM_VALUE.SKIP_INTERNAL_TEST } {
# Procedure called to update SKIP_INTERNAL_TEST when any of the dependent parameters in the arguments change
}
proc validate_PARAM_VALUE.SKIP_INTERNAL_TEST { PARAM_VALUE.SKIP_INTERNAL_TEST } {
# Procedure called to validate SKIP_INTERNAL_TEST
return true
}
proc update_PARAM_VALUE.WB2_ADDR_BITS { PARAM_VALUE.WB2_ADDR_BITS } {
# Procedure called to update WB2_ADDR_BITS when any of the dependent parameters in the arguments change
}
@ -406,11 +406,6 @@ proc update_MODELPARAM_VALUE.WB_ERROR { MODELPARAM_VALUE.WB_ERROR PARAM_VALUE.WB
set_property value [get_property value ${PARAM_VALUE.WB_ERROR}] ${MODELPARAM_VALUE.WB_ERROR}
}
proc update_MODELPARAM_VALUE.SKIP_INTERNAL_TEST { MODELPARAM_VALUE.SKIP_INTERNAL_TEST PARAM_VALUE.SKIP_INTERNAL_TEST } {
# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
set_property value [get_property value ${PARAM_VALUE.SKIP_INTERNAL_TEST}] ${MODELPARAM_VALUE.SKIP_INTERNAL_TEST}
}
proc update_MODELPARAM_VALUE.ECC_ENABLE { MODELPARAM_VALUE.ECC_ENABLE PARAM_VALUE.ECC_ENABLE } {
# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
set_property value [get_property value ${PARAM_VALUE.ECC_ENABLE}] ${MODELPARAM_VALUE.ECC_ENABLE}
@ -481,3 +476,8 @@ proc update_MODELPARAM_VALUE.AXI_DATA_WIDTH { MODELPARAM_VALUE.AXI_DATA_WIDTH PA
set_property value [get_property value ${PARAM_VALUE.AXI_DATA_WIDTH}] ${MODELPARAM_VALUE.AXI_DATA_WIDTH}
}
proc update_MODELPARAM_VALUE.BIST_MODE { MODELPARAM_VALUE.BIST_MODE PARAM_VALUE.BIST_MODE } {
# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
set_property value [get_property value ${PARAM_VALUE.BIST_MODE}] ${MODELPARAM_VALUE.BIST_MODE}
}