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UberDDR3
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just fixed delay

This commit is contained in:
AngeloJacobo 2023-08-04 07:54:20 +08:00
parent 0753e6e157
commit bc66655ca7
1 changed files with 2 additions and 2 deletions
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testbench/8192Mb_ddr3_parameters.vh
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@ -424,8 +424,8 @@
parameter RZQ = 240; // termination resistance
parameter PRE_DEF_PAT = 8'hAA; // value returned during mpr pre-defined pattern readout
parameter STOP_ON_ERROR = 1; // If set to 1, the model will halt on command sequence/major errors
parameter DEBUG = 0; // Turn on Debug messages
parameter BUS_DELAY = 0; // delay in picoseconds
parameter DEBUG = 1; // Turn on Debug messages
parameter BUS_DELAY = 100; // delay in picoseconds
parameter FLY_BY_DELAY_LANE_0 = 0; // delay in picoseconds
parameter FLY_BY_DELAY_LANE_1 = 0; // delay in picoseconds
parameter FLY_BY_DELAY_LANE_2 = 0; // delay in picoseconds