changed for x8 config

2023-08-20 11:10:15 +08:00 · 2023-08-20 11:10:15 +08:00 · 7c68bee5e8
parent e2653d5793
commit 7c68bee5e8
1 changed files with 1 additions and 1 deletions
--- a/testbench/ddr3.v
+++ b/testbench/ddr3.v
@ -96,7 +96,7 @@
 `timescale 1ps / 1ps
 `define den8192Mb
 `define sg125
-`define x16
+`define x8
 `default_nettype wire

 module ddr3 (