add vivado batch sim script (just run run_batch.sh)

testbench/xsim/README.txt

@@ -0,0 +1,49 @@
+################################################################################
+# Vivado (TM) v2022.1 (64-bit)
+#
+# README.txt: Please read the sections below to understand the steps required to
+#             run the exported script and information about the source files.
+#
+# Generated by export_simulation on Sat Jul 27 15:51:00 PST 2024
+#
+################################################################################
+
+1. How to run the generated simulation script:-
+
+From the shell prompt in the current directory, issue the following command:-
+
+./ddr3_dimm_micron_sim.sh
+
+This command will launch the 'compile', 'elaborate' and 'simulate' functions
+implemented in the script file for the 3-step flow. These functions are called
+from the main 'run' function in the script file.
+
+The 'run' function first executes the 'setup' function, the purpose of which is to
+create simulator specific setup files, create design library mappings and library
+directories and copy 'glbl.v' from the Vivado software install location into the
+current directory.
+
+The 'setup' function is also used for removing the simulator generated data in
+order to reset the current directory to the original state when export_simulation
+was launched from Vivado. This generated data can be removed by specifying the
+'-reset_run' switch to the './ddr3_dimm_micron_sim.sh' script.
+
+./ddr3_dimm_micron_sim.sh -reset_run
+
+To keep the generated data from the previous run but regenerate the setup files and
+library directories, use the '-noclean_files' switch.
+
+./ddr3_dimm_micron_sim.sh -noclean_files
+
+For more information on the script, please type './ddr3_dimm_micron_sim.sh -help'.
+
+2. Additional design information files:-
+
+export_simulation generates following additional file that can be used for fetching
+the design files information or for integrating with external custom scripts.
+
+Name   : file_info.txt
+Purpose: This file contains detail design file information based on the compile order
+         when export_simulation was executed from Vivado. The file contains information
+         about the file type, name, whether it is part of the IP, associated library
+         and the file path information.

testbench/xsim/cmd.tcl

@@ -0,0 +1,12 @@
+set curr_wave [current_wave_config]
+if { [string length $curr_wave] == 0 } {
+  if { [llength [get_objects]] > 0} {
+    add_wave /
+    set_property needs_save false [current_wave_config]
+  } else {
+     send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console."
+  }
+}
+
+run -all
+quit

testbench/xsim/file_info.txt

@@ -0,0 +1,9 @@
+ddr3_controller.v,verilog,xil_defaultlib,../Desktop/UberDDR3/rtl/ddr3_controller.v,incdir="../"
+ddr3_phy.v,verilog,xil_defaultlib,../Desktop/UberDDR3/rtl/ddr3_phy.v,incdir="../"
+ddr3_top.v,verilog,xil_defaultlib,../Desktop/UberDDR3/rtl/ddr3_top.v,incdir="../"
+ddr3.sv,systemverilog,xil_defaultlib,../Desktop/UberDDR3/testbench/ddr3.sv,incdir="../"
+ddr3.sv,systemverilog,xil_defaultlib,../Desktop/UberDDR3/testbench/ddr3_module.sv,incdir="../"
+ecc_dec.sv,systemverilog,xil_defaultlib,../Desktop/UberDDR3/rtl/ecc/ecc_dec.sv,incdir="../"
+ecc_enc.sv,systemverilog,xil_defaultlib,../Desktop/UberDDR3/rtl/ecc/ecc_enc.sv,incdir="../"
+ddr3_dimm_micron_sim.sv,systemverilog,xil_defaultlib,../Desktop/UberDDR3/testbench/ddr3_dimm_micron_sim.sv,incdir="../"
+glbl.v,Verilog,xil_defaultlib,glbl.v

testbench/xsim/glbl.v

@@ -0,0 +1,84 @@
+// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/glbl.v,v 1.14 2010/10/28 20:44:00 fphillip Exp $
+`ifndef GLBL
+`define GLBL
+`timescale  1 ps / 1 ps
+
+module glbl ();
+
+    parameter ROC_WIDTH = 100000;
+    parameter TOC_WIDTH = 0;
+    parameter GRES_WIDTH = 10000;
+    parameter GRES_START = 10000;
+
+//--------   STARTUP Globals --------------
+    wire GSR;
+    wire GTS;
+    wire GWE;
+    wire PRLD;
+    wire GRESTORE;
+    tri1 p_up_tmp;
+    tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
+
+    wire PROGB_GLBL;
+    wire CCLKO_GLBL;
+    wire FCSBO_GLBL;
+    wire [3:0] DO_GLBL;
+    wire [3:0] DI_GLBL;
+   
+    reg GSR_int;
+    reg GTS_int;
+    reg PRLD_int;
+    reg GRESTORE_int;
+
+//--------   JTAG Globals --------------
+    wire JTAG_TDO_GLBL;
+    wire JTAG_TCK_GLBL;
+    wire JTAG_TDI_GLBL;
+    wire JTAG_TMS_GLBL;
+    wire JTAG_TRST_GLBL;
+
+    reg JTAG_CAPTURE_GLBL;
+    reg JTAG_RESET_GLBL;
+    reg JTAG_SHIFT_GLBL;
+    reg JTAG_UPDATE_GLBL;
+    reg JTAG_RUNTEST_GLBL;
+
+    reg JTAG_SEL1_GLBL = 0;
+    reg JTAG_SEL2_GLBL = 0 ;
+    reg JTAG_SEL3_GLBL = 0;
+    reg JTAG_SEL4_GLBL = 0;
+
+    reg JTAG_USER_TDO1_GLBL = 1'bz;
+    reg JTAG_USER_TDO2_GLBL = 1'bz;
+    reg JTAG_USER_TDO3_GLBL = 1'bz;
+    reg JTAG_USER_TDO4_GLBL = 1'bz;
+
+    assign (strong1, weak0) GSR = GSR_int;
+    assign (strong1, weak0) GTS = GTS_int;
+    assign (weak1, weak0) PRLD = PRLD_int;
+    assign (strong1, weak0) GRESTORE = GRESTORE_int;
+
+    initial begin
+	GSR_int = 1'b1;
+	PRLD_int = 1'b1;
+	#(ROC_WIDTH)
+	GSR_int = 1'b0;
+	PRLD_int = 1'b0;
+    end
+
+    initial begin
+	GTS_int = 1'b1;
+	#(TOC_WIDTH)
+	GTS_int = 1'b0;
+    end
+
+    initial begin 
+	GRESTORE_int = 1'b0;
+	#(GRES_START);
+	GRESTORE_int = 1'b1;
+	#(GRES_WIDTH);
+	GRESTORE_int = 1'b0;
+    end
+
+endmodule
+`endif

testbench/xsim/run_batch.sh

@@ -0,0 +1,26 @@
+rm -rf *backup*
+rm -rf *test_ecc*.log*
+echo -e "\e[32mRun test: test_ecc_0 \e[0m"
+./test_ecc_0.sh -reset_run
+./test_ecc_0.sh >> ./test_ecc_0.log
+./test_ecc_0.sh -reset_run
+
+echo ""
+echo ""
+echo -e "\e[32mRun test: test_ecc_1 \e[0m"
+./test_ecc_1.sh >> ./test_ecc_1.log
+./test_ecc_1.sh -reset_run
+
+echo ""
+echo ""
+echo -e "\e[32mRun test: test_ecc_2 \e[0m"
+./test_ecc_2.sh >> ./test_ecc_2.log
+./test_ecc_2.sh -reset_run
+
+echo ""
+echo ""
+echo -e "\e[32mRun test: test_ecc_3 \e[0m"
+./test_ecc_3.sh >> ./test_ecc_3.log
+./test_ecc_3.sh -reset_run
+
+rm -rf *backup*

testbench/xsim/test_ecc_0.sh

@@ -0,0 +1,129 @@
+#!/bin/bash -f
+#*********************************************************************************************************
+# Vivado (TM) v2022.1 (64-bit)
+#
+# Filename    : ddr3_dimm_micron_sim.sh
+# Simulator   : Xilinx Vivado Simulator
+# Description : Simulation script for compiling, elaborating and verifying the project source files.
+#               The script will automatically create the design libraries sub-directories in the run
+#               directory, add the library logical mappings in the simulator setup file, create default
+#               'do/prj' file, execute compilation, elaboration and simulation steps.
+#
+# Generated by Vivado on Sat Jul 27 15:51:00 PST 2024
+# SW Build 3526262 on Mon Apr 18 15:47:01 MDT 2022
+#
+# Tool Version Limit: 2022.04 
+#
+# usage: ddr3_dimm_micron_sim.sh [-help]
+# usage: ddr3_dimm_micron_sim.sh [-lib_map_path]
+# usage: ddr3_dimm_micron_sim.sh [-noclean_files]
+# usage: ddr3_dimm_micron_sim.sh [-reset_run]
+#
+#*********************************************************************************************************
+
+# Set xvlog options
+xvlog_opts="--incr --relax -L uvm"
+
+# Script info
+echo -e "ddr3_dimm_micron_sim.sh - Script generated by export_simulation (Vivado v2022.1 (64-bit)-id)\n"
+
+# Main steps
+run()
+{
+  check_args $# $1
+  setup $1 $2
+  compile
+  elaborate
+  simulate
+}
+
+# RUN_STEP: <compile>
+compile()
+{
+  xvlog $xvlog_opts -prj vlog.prj 2>&1 | tee compile.log
+}
+
+# RUN_STEP: <elaborate>
+elaborate()
+{
+  xelab -generic_top "ECC_ENABLE=0" --incr --debug typical --relax --mt auto -L xil_defaultlib -L uvm -L unisims_ver -L unimacro_ver -L secureip --snapshot ddr3_dimm_micron_sim xil_defaultlib.ddr3_dimm_micron_sim xil_defaultlib.glbl -log elaborate.log
+}
+
+# RUN_STEP: <simulate>
+simulate()
+{
+  xsim ddr3_dimm_micron_sim -key {Behavioral:sim_1:Functional:ddr3_dimm_micron_sim} -tclbatch cmd.tcl -log simulate.log
+}
+
+# STEP: setup
+setup()
+{
+  case $1 in
+    "-lib_map_path" )
+      if [[ ($2 == "") ]]; then
+        echo -e "ERROR: Simulation library directory path not specified (type \"./ddr3_dimm_micron_sim.sh -help\" for more information)\n"
+        exit 1
+      fi
+    ;;
+    "-reset_run" )
+      reset_run
+      echo -e "INFO: Simulation run files deleted.\n"
+      exit 0
+    ;;
+    "-noclean_files" )
+      # do not remove previous data
+    ;;
+    * )
+  esac
+
+  # Add any setup/initialization commands here:-
+
+  # <user specific commands>
+
+}
+
+# Delete generated data from the previous run
+reset_run()
+{
+  files_to_remove=(xelab.pb xsim.jou xvhdl.log xvlog.log compile.log elaborate.log simulate.log xelab.log xsim.log run.log xvhdl.pb xvlog.pb ddr3_dimm_micron_sim.wdb xsim.dir)
+  for (( i=0; i<${#files_to_remove[*]}; i++ )); do
+    file="${files_to_remove[i]}"
+    if [[ -e $file ]]; then
+      rm -rf $file
+    fi
+  done
+}
+
+# Check command line arguments
+check_args()
+{
+  if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then
+    echo -e "ERROR: Unknown option specified '$2' (type \"./ddr3_dimm_micron_sim.sh -help\" for more information)\n"
+    exit 1
+  fi
+
+  if [[ ($2 == "-help" || $2 == "-h") ]]; then
+    usage
+  fi
+}
+
+# Script usage
+usage()
+{
+  msg="Usage: ddr3_dimm_micron_sim.sh [-help]\n\
+Usage: ddr3_dimm_micron_sim.sh [-lib_map_path]\n\
+Usage: ddr3_dimm_micron_sim.sh [-reset_run]\n\
+Usage: ddr3_dimm_micron_sim.sh [-noclean_files]\n\n\
+[-help] -- Print help information for this script\n\n\
+[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\
+using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\
+[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\
+from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\
+-noclean_files switch.\n\n\
+[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n"
+  echo -e $msg
+  exit 1
+}
+
+# Launch script
+run $1 $2

testbench/xsim/test_ecc_1.sh

@@ -0,0 +1,129 @@
+#!/bin/bash -f
+#*********************************************************************************************************
+# Vivado (TM) v2022.1 (64-bit)
+#
+# Filename    : ddr3_dimm_micron_sim.sh
+# Simulator   : Xilinx Vivado Simulator
+# Description : Simulation script for compiling, elaborating and verifying the project source files.
+#               The script will automatically create the design libraries sub-directories in the run
+#               directory, add the library logical mappings in the simulator setup file, create default
+#               'do/prj' file, execute compilation, elaboration and simulation steps.
+#
+# Generated by Vivado on Sat Jul 27 15:51:00 PST 2024
+# SW Build 3526262 on Mon Apr 18 15:47:01 MDT 2022
+#
+# Tool Version Limit: 2022.04 
+#
+# usage: ddr3_dimm_micron_sim.sh [-help]
+# usage: ddr3_dimm_micron_sim.sh [-lib_map_path]
+# usage: ddr3_dimm_micron_sim.sh [-noclean_files]
+# usage: ddr3_dimm_micron_sim.sh [-reset_run]
+#
+#*********************************************************************************************************
+
+# Set xvlog options
+xvlog_opts="--incr --relax -L uvm"
+
+# Script info
+echo -e "ddr3_dimm_micron_sim.sh - Script generated by export_simulation (Vivado v2022.1 (64-bit)-id)\n"
+
+# Main steps
+run()
+{
+  check_args $# $1
+  setup $1 $2
+  compile
+  elaborate
+  simulate
+}
+
+# RUN_STEP: <compile>
+compile()
+{
+  xvlog $xvlog_opts -prj vlog.prj 2>&1 | tee compile.log
+}
+
+# RUN_STEP: <elaborate>
+elaborate()
+{
+  xelab -generic_top "ECC_ENABLE=1" --incr --debug typical --relax --mt auto -L xil_defaultlib -L uvm -L unisims_ver -L unimacro_ver -L secureip --snapshot ddr3_dimm_micron_sim xil_defaultlib.ddr3_dimm_micron_sim xil_defaultlib.glbl -log elaborate.log
+}
+
+# RUN_STEP: <simulate>
+simulate()
+{
+  xsim ddr3_dimm_micron_sim -key {Behavioral:sim_1:Functional:ddr3_dimm_micron_sim} -tclbatch cmd.tcl -log simulate.log
+}
+
+# STEP: setup
+setup()
+{
+  case $1 in
+    "-lib_map_path" )
+      if [[ ($2 == "") ]]; then
+        echo -e "ERROR: Simulation library directory path not specified (type \"./ddr3_dimm_micron_sim.sh -help\" for more information)\n"
+        exit 1
+      fi
+    ;;
+    "-reset_run" )
+      reset_run
+      echo -e "INFO: Simulation run files deleted.\n"
+      exit 0
+    ;;
+    "-noclean_files" )
+      # do not remove previous data
+    ;;
+    * )
+  esac
+
+  # Add any setup/initialization commands here:-
+
+  # <user specific commands>
+
+}
+
+# Delete generated data from the previous run
+reset_run()
+{
+  files_to_remove=(xelab.pb xsim.jou xvhdl.log xvlog.log compile.log elaborate.log simulate.log xelab.log xsim.log run.log xvhdl.pb xvlog.pb ddr3_dimm_micron_sim.wdb xsim.dir)
+  for (( i=0; i<${#files_to_remove[*]}; i++ )); do
+    file="${files_to_remove[i]}"
+    if [[ -e $file ]]; then
+      rm -rf $file
+    fi
+  done
+}
+
+# Check command line arguments
+check_args()
+{
+  if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then
+    echo -e "ERROR: Unknown option specified '$2' (type \"./ddr3_dimm_micron_sim.sh -help\" for more information)\n"
+    exit 1
+  fi
+
+  if [[ ($2 == "-help" || $2 == "-h") ]]; then
+    usage
+  fi
+}
+
+# Script usage
+usage()
+{
+  msg="Usage: ddr3_dimm_micron_sim.sh [-help]\n\
+Usage: ddr3_dimm_micron_sim.sh [-lib_map_path]\n\
+Usage: ddr3_dimm_micron_sim.sh [-reset_run]\n\
+Usage: ddr3_dimm_micron_sim.sh [-noclean_files]\n\n\
+[-help] -- Print help information for this script\n\n\
+[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\
+using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\
+[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\
+from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\
+-noclean_files switch.\n\n\
+[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n"
+  echo -e $msg
+  exit 1
+}
+
+# Launch script
+run $1 $2

testbench/xsim/test_ecc_2.sh

@@ -0,0 +1,129 @@
+#!/bin/bash -f
+#*********************************************************************************************************
+# Vivado (TM) v2022.1 (64-bit)
+#
+# Filename    : ddr3_dimm_micron_sim.sh
+# Simulator   : Xilinx Vivado Simulator
+# Description : Simulation script for compiling, elaborating and verifying the project source files.
+#               The script will automatically create the design libraries sub-directories in the run
+#               directory, add the library logical mappings in the simulator setup file, create default
+#               'do/prj' file, execute compilation, elaboration and simulation steps.
+#
+# Generated by Vivado on Sat Jul 27 15:51:00 PST 2024
+# SW Build 3526262 on Mon Apr 18 15:47:01 MDT 2022
+#
+# Tool Version Limit: 2022.04 
+#
+# usage: ddr3_dimm_micron_sim.sh [-help]
+# usage: ddr3_dimm_micron_sim.sh [-lib_map_path]
+# usage: ddr3_dimm_micron_sim.sh [-noclean_files]
+# usage: ddr3_dimm_micron_sim.sh [-reset_run]
+#
+#*********************************************************************************************************
+
+# Set xvlog options
+xvlog_opts="--incr --relax -L uvm"
+
+# Script info
+echo -e "ddr3_dimm_micron_sim.sh - Script generated by export_simulation (Vivado v2022.1 (64-bit)-id)\n"
+
+# Main steps
+run()
+{
+  check_args $# $1
+  setup $1 $2
+  compile
+  elaborate
+  simulate
+}
+
+# RUN_STEP: <compile>
+compile()
+{
+  xvlog $xvlog_opts -prj vlog.prj 2>&1 | tee compile.log
+}
+
+# RUN_STEP: <elaborate>
+elaborate()
+{
+  xelab -generic_top "ECC_ENABLE=2" --incr --debug typical --relax --mt auto -L xil_defaultlib -L uvm -L unisims_ver -L unimacro_ver -L secureip --snapshot ddr3_dimm_micron_sim xil_defaultlib.ddr3_dimm_micron_sim xil_defaultlib.glbl -log elaborate.log
+}
+
+# RUN_STEP: <simulate>
+simulate()
+{
+  xsim ddr3_dimm_micron_sim -key {Behavioral:sim_1:Functional:ddr3_dimm_micron_sim} -tclbatch cmd.tcl -log simulate.log
+}
+
+# STEP: setup
+setup()
+{
+  case $1 in
+    "-lib_map_path" )
+      if [[ ($2 == "") ]]; then
+        echo -e "ERROR: Simulation library directory path not specified (type \"./ddr3_dimm_micron_sim.sh -help\" for more information)\n"
+        exit 1
+      fi
+    ;;
+    "-reset_run" )
+      reset_run
+      echo -e "INFO: Simulation run files deleted.\n"
+      exit 0
+    ;;
+    "-noclean_files" )
+      # do not remove previous data
+    ;;
+    * )
+  esac
+
+  # Add any setup/initialization commands here:-
+
+  # <user specific commands>
+
+}
+
+# Delete generated data from the previous run
+reset_run()
+{
+  files_to_remove=(xelab.pb xsim.jou xvhdl.log xvlog.log compile.log elaborate.log simulate.log xelab.log xsim.log run.log xvhdl.pb xvlog.pb ddr3_dimm_micron_sim.wdb xsim.dir)
+  for (( i=0; i<${#files_to_remove[*]}; i++ )); do
+    file="${files_to_remove[i]}"
+    if [[ -e $file ]]; then
+      rm -rf $file
+    fi
+  done
+}
+
+# Check command line arguments
+check_args()
+{
+  if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then
+    echo -e "ERROR: Unknown option specified '$2' (type \"./ddr3_dimm_micron_sim.sh -help\" for more information)\n"
+    exit 1
+  fi
+
+  if [[ ($2 == "-help" || $2 == "-h") ]]; then
+    usage
+  fi
+}
+
+# Script usage
+usage()
+{
+  msg="Usage: ddr3_dimm_micron_sim.sh [-help]\n\
+Usage: ddr3_dimm_micron_sim.sh [-lib_map_path]\n\
+Usage: ddr3_dimm_micron_sim.sh [-reset_run]\n\
+Usage: ddr3_dimm_micron_sim.sh [-noclean_files]\n\n\
+[-help] -- Print help information for this script\n\n\
+[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\
+using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\
+[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\
+from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\
+-noclean_files switch.\n\n\
+[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n"
+  echo -e $msg
+  exit 1
+}
+
+# Launch script
+run $1 $2

testbench/xsim/test_ecc_3.sh

@@ -0,0 +1,129 @@
+#!/bin/bash -f
+#*********************************************************************************************************
+# Vivado (TM) v2022.1 (64-bit)
+#
+# Filename    : ddr3_dimm_micron_sim.sh
+# Simulator   : Xilinx Vivado Simulator
+# Description : Simulation script for compiling, elaborating and verifying the project source files.
+#               The script will automatically create the design libraries sub-directories in the run
+#               directory, add the library logical mappings in the simulator setup file, create default
+#               'do/prj' file, execute compilation, elaboration and simulation steps.
+#
+# Generated by Vivado on Sat Jul 27 15:51:00 PST 2024
+# SW Build 3526262 on Mon Apr 18 15:47:01 MDT 2022
+#
+# Tool Version Limit: 2022.04 
+#
+# usage: ddr3_dimm_micron_sim.sh [-help]
+# usage: ddr3_dimm_micron_sim.sh [-lib_map_path]
+# usage: ddr3_dimm_micron_sim.sh [-noclean_files]
+# usage: ddr3_dimm_micron_sim.sh [-reset_run]
+#
+#*********************************************************************************************************
+
+# Set xvlog options
+xvlog_opts="--incr --relax -L uvm"
+
+# Script info
+echo -e "ddr3_dimm_micron_sim.sh - Script generated by export_simulation (Vivado v2022.1 (64-bit)-id)\n"
+
+# Main steps
+run()
+{
+  check_args $# $1
+  setup $1 $2
+  compile
+  elaborate
+  simulate
+}
+
+# RUN_STEP: <compile>
+compile()
+{
+  xvlog $xvlog_opts -prj vlog.prj 2>&1 | tee compile.log
+}
+
+# RUN_STEP: <elaborate>
+elaborate()
+{
+  xelab -generic_top "ECC_ENABLE=3" --incr --debug typical --relax --mt auto -L xil_defaultlib -L uvm -L unisims_ver -L unimacro_ver -L secureip --snapshot ddr3_dimm_micron_sim xil_defaultlib.ddr3_dimm_micron_sim xil_defaultlib.glbl -log elaborate.log
+}
+
+# RUN_STEP: <simulate>
+simulate()
+{
+  xsim ddr3_dimm_micron_sim -key {Behavioral:sim_1:Functional:ddr3_dimm_micron_sim} -tclbatch cmd.tcl -log simulate.log
+}
+
+# STEP: setup
+setup()
+{
+  case $1 in
+    "-lib_map_path" )
+      if [[ ($2 == "") ]]; then
+        echo -e "ERROR: Simulation library directory path not specified (type \"./ddr3_dimm_micron_sim.sh -help\" for more information)\n"
+        exit 1
+      fi
+    ;;
+    "-reset_run" )
+      reset_run
+      echo -e "INFO: Simulation run files deleted.\n"
+      exit 0
+    ;;
+    "-noclean_files" )
+      # do not remove previous data
+    ;;
+    * )
+  esac
+
+  # Add any setup/initialization commands here:-
+
+  # <user specific commands>
+
+}
+
+# Delete generated data from the previous run
+reset_run()
+{
+  files_to_remove=(xelab.pb xsim.jou xvhdl.log xvlog.log compile.log elaborate.log simulate.log xelab.log xsim.log run.log xvhdl.pb xvlog.pb ddr3_dimm_micron_sim.wdb xsim.dir)
+  for (( i=0; i<${#files_to_remove[*]}; i++ )); do
+    file="${files_to_remove[i]}"
+    if [[ -e $file ]]; then
+      rm -rf $file
+    fi
+  done
+}
+
+# Check command line arguments
+check_args()
+{
+  if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then
+    echo -e "ERROR: Unknown option specified '$2' (type \"./ddr3_dimm_micron_sim.sh -help\" for more information)\n"
+    exit 1
+  fi
+
+  if [[ ($2 == "-help" || $2 == "-h") ]]; then
+    usage
+  fi
+}
+
+# Script usage
+usage()
+{
+  msg="Usage: ddr3_dimm_micron_sim.sh [-help]\n\
+Usage: ddr3_dimm_micron_sim.sh [-lib_map_path]\n\
+Usage: ddr3_dimm_micron_sim.sh [-reset_run]\n\
+Usage: ddr3_dimm_micron_sim.sh [-noclean_files]\n\n\
+[-help] -- Print help information for this script\n\n\
+[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\
+using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\
+[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\
+from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\
+-noclean_files switch.\n\n\
+[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n"
+  echo -e $msg
+  exit 1
+}
+
+# Launch script
+run $1 $2

testbench/xsim/vlog.prj

@@ -0,0 +1,15 @@
+verilog xil_defaultlib --include "../" \
+"../../rtl/ddr3_controller.v" \
+"../../rtl/ddr3_phy.v" \
+"../../rtl/ddr3_top.v" \
+
+sv xil_defaultlib --include "../" \
+"../ddr3.sv" \
+"../../rtl/ecc/ecc_dec.sv" \
+"../../rtl/ecc/ecc_enc.sv" \
+"../ddr3_dimm_micron_sim.sv" \
+"../ddr3_module.sv" \
+
+verilog xil_defaultlib "glbl.v"
+
+nosort

testbench/xsim/xsim.ini

@@ -0,0 +1 @@
+xil_defaultlib=xsim.dir/xil_defaultlib