add vivado batch sim script (just run run_batch.sh)
This commit is contained in:
AngeloJacobo
parent
55bb8be939
commit
6f5eb49e79
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################################################################################
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# Vivado (TM) v2022.1 (64-bit)
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#
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# README.txt: Please read the sections below to understand the steps required to
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# run the exported script and information about the source files.
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#
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# Generated by export_simulation on Sat Jul 27 15:51:00 PST 2024
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#
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################################################################################
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1. How to run the generated simulation script:-
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From the shell prompt in the current directory, issue the following command:-
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./ddr3_dimm_micron_sim.sh
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This command will launch the 'compile', 'elaborate' and 'simulate' functions
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implemented in the script file for the 3-step flow. These functions are called
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from the main 'run' function in the script file.
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The 'run' function first executes the 'setup' function, the purpose of which is to
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create simulator specific setup files, create design library mappings and library
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directories and copy 'glbl.v' from the Vivado software install location into the
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current directory.
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The 'setup' function is also used for removing the simulator generated data in
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order to reset the current directory to the original state when export_simulation
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was launched from Vivado. This generated data can be removed by specifying the
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'-reset_run' switch to the './ddr3_dimm_micron_sim.sh' script.
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./ddr3_dimm_micron_sim.sh -reset_run
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To keep the generated data from the previous run but regenerate the setup files and
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library directories, use the '-noclean_files' switch.
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./ddr3_dimm_micron_sim.sh -noclean_files
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For more information on the script, please type './ddr3_dimm_micron_sim.sh -help'.
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2. Additional design information files:-
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export_simulation generates following additional file that can be used for fetching
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the design files information or for integrating with external custom scripts.
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Name : file_info.txt
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Purpose: This file contains detail design file information based on the compile order
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when export_simulation was executed from Vivado. The file contains information
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about the file type, name, whether it is part of the IP, associated library
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and the file path information.
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set curr_wave [current_wave_config]
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if { [string length $curr_wave] == 0 } {
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if { [llength [get_objects]] > 0} {
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add_wave /
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set_property needs_save false [current_wave_config]
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} else {
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send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console."
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}
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}
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run -all
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quit
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ddr3_controller.v,verilog,xil_defaultlib,../Desktop/UberDDR3/rtl/ddr3_controller.v,incdir="../"
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ddr3_phy.v,verilog,xil_defaultlib,../Desktop/UberDDR3/rtl/ddr3_phy.v,incdir="../"
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ddr3_top.v,verilog,xil_defaultlib,../Desktop/UberDDR3/rtl/ddr3_top.v,incdir="../"
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ddr3.sv,systemverilog,xil_defaultlib,../Desktop/UberDDR3/testbench/ddr3.sv,incdir="../"
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ddr3.sv,systemverilog,xil_defaultlib,../Desktop/UberDDR3/testbench/ddr3_module.sv,incdir="../"
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ecc_dec.sv,systemverilog,xil_defaultlib,../Desktop/UberDDR3/rtl/ecc/ecc_dec.sv,incdir="../"
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ecc_enc.sv,systemverilog,xil_defaultlib,../Desktop/UberDDR3/rtl/ecc/ecc_enc.sv,incdir="../"
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ddr3_dimm_micron_sim.sv,systemverilog,xil_defaultlib,../Desktop/UberDDR3/testbench/ddr3_dimm_micron_sim.sv,incdir="../"
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glbl.v,Verilog,xil_defaultlib,glbl.v
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// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/glbl.v,v 1.14 2010/10/28 20:44:00 fphillip Exp $
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`ifndef GLBL
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`define GLBL
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`timescale 1 ps / 1 ps
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module glbl ();
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parameter ROC_WIDTH = 100000;
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parameter TOC_WIDTH = 0;
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parameter GRES_WIDTH = 10000;
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parameter GRES_START = 10000;
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//-------- STARTUP Globals --------------
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wire GSR;
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wire GTS;
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wire GWE;
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wire PRLD;
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wire GRESTORE;
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tri1 p_up_tmp;
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tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
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wire PROGB_GLBL;
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wire CCLKO_GLBL;
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wire FCSBO_GLBL;
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wire [3:0] DO_GLBL;
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wire [3:0] DI_GLBL;
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reg GSR_int;
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reg GTS_int;
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reg PRLD_int;
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reg GRESTORE_int;
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//-------- JTAG Globals --------------
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wire JTAG_TDO_GLBL;
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wire JTAG_TCK_GLBL;
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wire JTAG_TDI_GLBL;
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wire JTAG_TMS_GLBL;
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wire JTAG_TRST_GLBL;
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reg JTAG_CAPTURE_GLBL;
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reg JTAG_RESET_GLBL;
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reg JTAG_SHIFT_GLBL;
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reg JTAG_UPDATE_GLBL;
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reg JTAG_RUNTEST_GLBL;
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reg JTAG_SEL1_GLBL = 0;
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reg JTAG_SEL2_GLBL = 0 ;
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reg JTAG_SEL3_GLBL = 0;
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reg JTAG_SEL4_GLBL = 0;
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reg JTAG_USER_TDO1_GLBL = 1'bz;
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reg JTAG_USER_TDO2_GLBL = 1'bz;
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reg JTAG_USER_TDO3_GLBL = 1'bz;
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reg JTAG_USER_TDO4_GLBL = 1'bz;
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assign (strong1, weak0) GSR = GSR_int;
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assign (strong1, weak0) GTS = GTS_int;
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assign (weak1, weak0) PRLD = PRLD_int;
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assign (strong1, weak0) GRESTORE = GRESTORE_int;
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initial begin
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GSR_int = 1'b1;
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PRLD_int = 1'b1;
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#(ROC_WIDTH)
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GSR_int = 1'b0;
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PRLD_int = 1'b0;
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end
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initial begin
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GTS_int = 1'b1;
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#(TOC_WIDTH)
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GTS_int = 1'b0;
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end
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initial begin
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GRESTORE_int = 1'b0;
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#(GRES_START);
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GRESTORE_int = 1'b1;
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#(GRES_WIDTH);
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GRESTORE_int = 1'b0;
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end
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endmodule
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`endif
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rm -rf *backup*
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rm -rf *test_ecc*.log*
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echo -e "\e[32mRun test: test_ecc_0 \e[0m"
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./test_ecc_0.sh -reset_run
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./test_ecc_0.sh >> ./test_ecc_0.log
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./test_ecc_0.sh -reset_run
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echo ""
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echo ""
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echo -e "\e[32mRun test: test_ecc_1 \e[0m"
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./test_ecc_1.sh >> ./test_ecc_1.log
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./test_ecc_1.sh -reset_run
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echo ""
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echo ""
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echo -e "\e[32mRun test: test_ecc_2 \e[0m"
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./test_ecc_2.sh >> ./test_ecc_2.log
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./test_ecc_2.sh -reset_run
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echo ""
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echo ""
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echo -e "\e[32mRun test: test_ecc_3 \e[0m"
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./test_ecc_3.sh >> ./test_ecc_3.log
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./test_ecc_3.sh -reset_run
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rm -rf *backup*
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File diff suppressed because it is too large
Load Diff
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#!/bin/bash -f
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#*********************************************************************************************************
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# Vivado (TM) v2022.1 (64-bit)
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#
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# Filename : ddr3_dimm_micron_sim.sh
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# Simulator : Xilinx Vivado Simulator
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# Description : Simulation script for compiling, elaborating and verifying the project source files.
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# The script will automatically create the design libraries sub-directories in the run
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# directory, add the library logical mappings in the simulator setup file, create default
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# 'do/prj' file, execute compilation, elaboration and simulation steps.
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#
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# Generated by Vivado on Sat Jul 27 15:51:00 PST 2024
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# SW Build 3526262 on Mon Apr 18 15:47:01 MDT 2022
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#
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# Tool Version Limit: 2022.04
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#
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# usage: ddr3_dimm_micron_sim.sh [-help]
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# usage: ddr3_dimm_micron_sim.sh [-lib_map_path]
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# usage: ddr3_dimm_micron_sim.sh [-noclean_files]
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# usage: ddr3_dimm_micron_sim.sh [-reset_run]
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#
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#*********************************************************************************************************
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# Set xvlog options
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xvlog_opts="--incr --relax -L uvm"
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# Script info
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echo -e "ddr3_dimm_micron_sim.sh - Script generated by export_simulation (Vivado v2022.1 (64-bit)-id)\n"
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# Main steps
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run()
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{
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check_args $# $1
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setup $1 $2
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compile
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elaborate
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simulate
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}
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# RUN_STEP: <compile>
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compile()
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{
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xvlog $xvlog_opts -prj vlog.prj 2>&1 | tee compile.log
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}
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# RUN_STEP: <elaborate>
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elaborate()
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{
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xelab -generic_top "ECC_ENABLE=0" --incr --debug typical --relax --mt auto -L xil_defaultlib -L uvm -L unisims_ver -L unimacro_ver -L secureip --snapshot ddr3_dimm_micron_sim xil_defaultlib.ddr3_dimm_micron_sim xil_defaultlib.glbl -log elaborate.log
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}
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# RUN_STEP: <simulate>
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simulate()
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{
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xsim ddr3_dimm_micron_sim -key {Behavioral:sim_1:Functional:ddr3_dimm_micron_sim} -tclbatch cmd.tcl -log simulate.log
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}
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# STEP: setup
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setup()
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{
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case $1 in
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"-lib_map_path" )
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if [[ ($2 == "") ]]; then
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echo -e "ERROR: Simulation library directory path not specified (type \"./ddr3_dimm_micron_sim.sh -help\" for more information)\n"
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exit 1
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fi
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;;
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"-reset_run" )
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reset_run
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echo -e "INFO: Simulation run files deleted.\n"
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exit 0
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;;
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"-noclean_files" )
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# do not remove previous data
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;;
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* )
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esac
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# Add any setup/initialization commands here:-
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# <user specific commands>
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}
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# Delete generated data from the previous run
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reset_run()
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{
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files_to_remove=(xelab.pb xsim.jou xvhdl.log xvlog.log compile.log elaborate.log simulate.log xelab.log xsim.log run.log xvhdl.pb xvlog.pb ddr3_dimm_micron_sim.wdb xsim.dir)
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for (( i=0; i<${#files_to_remove[*]}; i++ )); do
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file="${files_to_remove[i]}"
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if [[ -e $file ]]; then
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rm -rf $file
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fi
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done
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}
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# Check command line arguments
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check_args()
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{
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if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then
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echo -e "ERROR: Unknown option specified '$2' (type \"./ddr3_dimm_micron_sim.sh -help\" for more information)\n"
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exit 1
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fi
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if [[ ($2 == "-help" || $2 == "-h") ]]; then
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usage
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fi
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}
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# Script usage
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usage()
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{
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msg="Usage: ddr3_dimm_micron_sim.sh [-help]\n\
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Usage: ddr3_dimm_micron_sim.sh [-lib_map_path]\n\
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Usage: ddr3_dimm_micron_sim.sh [-reset_run]\n\
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Usage: ddr3_dimm_micron_sim.sh [-noclean_files]\n\n\
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[-help] -- Print help information for this script\n\n\
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[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\
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using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\
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[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\
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from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\
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-noclean_files switch.\n\n\
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[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n"
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echo -e $msg
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exit 1
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}
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# Launch script
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run $1 $2
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File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,129 @@
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#!/bin/bash -f
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#*********************************************************************************************************
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# Vivado (TM) v2022.1 (64-bit)
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#
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# Filename : ddr3_dimm_micron_sim.sh
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# Simulator : Xilinx Vivado Simulator
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# Description : Simulation script for compiling, elaborating and verifying the project source files.
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# The script will automatically create the design libraries sub-directories in the run
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# directory, add the library logical mappings in the simulator setup file, create default
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# 'do/prj' file, execute compilation, elaboration and simulation steps.
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#
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# Generated by Vivado on Sat Jul 27 15:51:00 PST 2024
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# SW Build 3526262 on Mon Apr 18 15:47:01 MDT 2022
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#
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# Tool Version Limit: 2022.04
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#
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# usage: ddr3_dimm_micron_sim.sh [-help]
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# usage: ddr3_dimm_micron_sim.sh [-lib_map_path]
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# usage: ddr3_dimm_micron_sim.sh [-noclean_files]
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# usage: ddr3_dimm_micron_sim.sh [-reset_run]
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#
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#*********************************************************************************************************
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# Set xvlog options
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xvlog_opts="--incr --relax -L uvm"
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# Script info
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echo -e "ddr3_dimm_micron_sim.sh - Script generated by export_simulation (Vivado v2022.1 (64-bit)-id)\n"
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# Main steps
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run()
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{
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check_args $# $1
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setup $1 $2
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compile
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elaborate
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simulate
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}
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# RUN_STEP: <compile>
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compile()
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{
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xvlog $xvlog_opts -prj vlog.prj 2>&1 | tee compile.log
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}
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# RUN_STEP: <elaborate>
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elaborate()
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{
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xelab -generic_top "ECC_ENABLE=1" --incr --debug typical --relax --mt auto -L xil_defaultlib -L uvm -L unisims_ver -L unimacro_ver -L secureip --snapshot ddr3_dimm_micron_sim xil_defaultlib.ddr3_dimm_micron_sim xil_defaultlib.glbl -log elaborate.log
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}
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# RUN_STEP: <simulate>
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simulate()
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{
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xsim ddr3_dimm_micron_sim -key {Behavioral:sim_1:Functional:ddr3_dimm_micron_sim} -tclbatch cmd.tcl -log simulate.log
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}
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# STEP: setup
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setup()
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{
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case $1 in
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"-lib_map_path" )
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if [[ ($2 == "") ]]; then
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echo -e "ERROR: Simulation library directory path not specified (type \"./ddr3_dimm_micron_sim.sh -help\" for more information)\n"
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exit 1
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fi
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;;
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"-reset_run" )
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reset_run
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echo -e "INFO: Simulation run files deleted.\n"
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exit 0
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;;
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"-noclean_files" )
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# do not remove previous data
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;;
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* )
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esac
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# Add any setup/initialization commands here:-
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# <user specific commands>
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}
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# Delete generated data from the previous run
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reset_run()
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{
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files_to_remove=(xelab.pb xsim.jou xvhdl.log xvlog.log compile.log elaborate.log simulate.log xelab.log xsim.log run.log xvhdl.pb xvlog.pb ddr3_dimm_micron_sim.wdb xsim.dir)
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for (( i=0; i<${#files_to_remove[*]}; i++ )); do
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file="${files_to_remove[i]}"
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if [[ -e $file ]]; then
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rm -rf $file
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fi
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done
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}
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# Check command line arguments
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check_args()
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{
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if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then
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echo -e "ERROR: Unknown option specified '$2' (type \"./ddr3_dimm_micron_sim.sh -help\" for more information)\n"
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exit 1
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fi
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if [[ ($2 == "-help" || $2 == "-h") ]]; then
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usage
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fi
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}
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# Script usage
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usage()
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{
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msg="Usage: ddr3_dimm_micron_sim.sh [-help]\n\
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Usage: ddr3_dimm_micron_sim.sh [-lib_map_path]\n\
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Usage: ddr3_dimm_micron_sim.sh [-reset_run]\n\
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Usage: ddr3_dimm_micron_sim.sh [-noclean_files]\n\n\
|
||||
[-help] -- Print help information for this script\n\n\
|
||||
[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\
|
||||
using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\
|
||||
[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\
|
||||
from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\
|
||||
-noclean_files switch.\n\n\
|
||||
[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n"
|
||||
echo -e $msg
|
||||
exit 1
|
||||
}
|
||||
|
||||
# Launch script
|
||||
run $1 $2
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,129 @@
|
|||
#!/bin/bash -f
|
||||
#*********************************************************************************************************
|
||||
# Vivado (TM) v2022.1 (64-bit)
|
||||
#
|
||||
# Filename : ddr3_dimm_micron_sim.sh
|
||||
# Simulator : Xilinx Vivado Simulator
|
||||
# Description : Simulation script for compiling, elaborating and verifying the project source files.
|
||||
# The script will automatically create the design libraries sub-directories in the run
|
||||
# directory, add the library logical mappings in the simulator setup file, create default
|
||||
# 'do/prj' file, execute compilation, elaboration and simulation steps.
|
||||
#
|
||||
# Generated by Vivado on Sat Jul 27 15:51:00 PST 2024
|
||||
# SW Build 3526262 on Mon Apr 18 15:47:01 MDT 2022
|
||||
#
|
||||
# Tool Version Limit: 2022.04
|
||||
#
|
||||
# usage: ddr3_dimm_micron_sim.sh [-help]
|
||||
# usage: ddr3_dimm_micron_sim.sh [-lib_map_path]
|
||||
# usage: ddr3_dimm_micron_sim.sh [-noclean_files]
|
||||
# usage: ddr3_dimm_micron_sim.sh [-reset_run]
|
||||
#
|
||||
#*********************************************************************************************************
|
||||
|
||||
# Set xvlog options
|
||||
xvlog_opts="--incr --relax -L uvm"
|
||||
|
||||
# Script info
|
||||
echo -e "ddr3_dimm_micron_sim.sh - Script generated by export_simulation (Vivado v2022.1 (64-bit)-id)\n"
|
||||
|
||||
# Main steps
|
||||
run()
|
||||
{
|
||||
check_args $# $1
|
||||
setup $1 $2
|
||||
compile
|
||||
elaborate
|
||||
simulate
|
||||
}
|
||||
|
||||
# RUN_STEP: <compile>
|
||||
compile()
|
||||
{
|
||||
xvlog $xvlog_opts -prj vlog.prj 2>&1 | tee compile.log
|
||||
}
|
||||
|
||||
# RUN_STEP: <elaborate>
|
||||
elaborate()
|
||||
{
|
||||
xelab -generic_top "ECC_ENABLE=2" --incr --debug typical --relax --mt auto -L xil_defaultlib -L uvm -L unisims_ver -L unimacro_ver -L secureip --snapshot ddr3_dimm_micron_sim xil_defaultlib.ddr3_dimm_micron_sim xil_defaultlib.glbl -log elaborate.log
|
||||
}
|
||||
|
||||
# RUN_STEP: <simulate>
|
||||
simulate()
|
||||
{
|
||||
xsim ddr3_dimm_micron_sim -key {Behavioral:sim_1:Functional:ddr3_dimm_micron_sim} -tclbatch cmd.tcl -log simulate.log
|
||||
}
|
||||
|
||||
# STEP: setup
|
||||
setup()
|
||||
{
|
||||
case $1 in
|
||||
"-lib_map_path" )
|
||||
if [[ ($2 == "") ]]; then
|
||||
echo -e "ERROR: Simulation library directory path not specified (type \"./ddr3_dimm_micron_sim.sh -help\" for more information)\n"
|
||||
exit 1
|
||||
fi
|
||||
;;
|
||||
"-reset_run" )
|
||||
reset_run
|
||||
echo -e "INFO: Simulation run files deleted.\n"
|
||||
exit 0
|
||||
;;
|
||||
"-noclean_files" )
|
||||
# do not remove previous data
|
||||
;;
|
||||
* )
|
||||
esac
|
||||
|
||||
# Add any setup/initialization commands here:-
|
||||
|
||||
# <user specific commands>
|
||||
|
||||
}
|
||||
|
||||
# Delete generated data from the previous run
|
||||
reset_run()
|
||||
{
|
||||
files_to_remove=(xelab.pb xsim.jou xvhdl.log xvlog.log compile.log elaborate.log simulate.log xelab.log xsim.log run.log xvhdl.pb xvlog.pb ddr3_dimm_micron_sim.wdb xsim.dir)
|
||||
for (( i=0; i<${#files_to_remove[*]}; i++ )); do
|
||||
file="${files_to_remove[i]}"
|
||||
if [[ -e $file ]]; then
|
||||
rm -rf $file
|
||||
fi
|
||||
done
|
||||
}
|
||||
|
||||
# Check command line arguments
|
||||
check_args()
|
||||
{
|
||||
if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then
|
||||
echo -e "ERROR: Unknown option specified '$2' (type \"./ddr3_dimm_micron_sim.sh -help\" for more information)\n"
|
||||
exit 1
|
||||
fi
|
||||
|
||||
if [[ ($2 == "-help" || $2 == "-h") ]]; then
|
||||
usage
|
||||
fi
|
||||
}
|
||||
|
||||
# Script usage
|
||||
usage()
|
||||
{
|
||||
msg="Usage: ddr3_dimm_micron_sim.sh [-help]\n\
|
||||
Usage: ddr3_dimm_micron_sim.sh [-lib_map_path]\n\
|
||||
Usage: ddr3_dimm_micron_sim.sh [-reset_run]\n\
|
||||
Usage: ddr3_dimm_micron_sim.sh [-noclean_files]\n\n\
|
||||
[-help] -- Print help information for this script\n\n\
|
||||
[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\
|
||||
using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\
|
||||
[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\
|
||||
from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\
|
||||
-noclean_files switch.\n\n\
|
||||
[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n"
|
||||
echo -e $msg
|
||||
exit 1
|
||||
}
|
||||
|
||||
# Launch script
|
||||
run $1 $2
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,129 @@
|
|||
#!/bin/bash -f
|
||||
#*********************************************************************************************************
|
||||
# Vivado (TM) v2022.1 (64-bit)
|
||||
#
|
||||
# Filename : ddr3_dimm_micron_sim.sh
|
||||
# Simulator : Xilinx Vivado Simulator
|
||||
# Description : Simulation script for compiling, elaborating and verifying the project source files.
|
||||
# The script will automatically create the design libraries sub-directories in the run
|
||||
# directory, add the library logical mappings in the simulator setup file, create default
|
||||
# 'do/prj' file, execute compilation, elaboration and simulation steps.
|
||||
#
|
||||
# Generated by Vivado on Sat Jul 27 15:51:00 PST 2024
|
||||
# SW Build 3526262 on Mon Apr 18 15:47:01 MDT 2022
|
||||
#
|
||||
# Tool Version Limit: 2022.04
|
||||
#
|
||||
# usage: ddr3_dimm_micron_sim.sh [-help]
|
||||
# usage: ddr3_dimm_micron_sim.sh [-lib_map_path]
|
||||
# usage: ddr3_dimm_micron_sim.sh [-noclean_files]
|
||||
# usage: ddr3_dimm_micron_sim.sh [-reset_run]
|
||||
#
|
||||
#*********************************************************************************************************
|
||||
|
||||
# Set xvlog options
|
||||
xvlog_opts="--incr --relax -L uvm"
|
||||
|
||||
# Script info
|
||||
echo -e "ddr3_dimm_micron_sim.sh - Script generated by export_simulation (Vivado v2022.1 (64-bit)-id)\n"
|
||||
|
||||
# Main steps
|
||||
run()
|
||||
{
|
||||
check_args $# $1
|
||||
setup $1 $2
|
||||
compile
|
||||
elaborate
|
||||
simulate
|
||||
}
|
||||
|
||||
# RUN_STEP: <compile>
|
||||
compile()
|
||||
{
|
||||
xvlog $xvlog_opts -prj vlog.prj 2>&1 | tee compile.log
|
||||
}
|
||||
|
||||
# RUN_STEP: <elaborate>
|
||||
elaborate()
|
||||
{
|
||||
xelab -generic_top "ECC_ENABLE=3" --incr --debug typical --relax --mt auto -L xil_defaultlib -L uvm -L unisims_ver -L unimacro_ver -L secureip --snapshot ddr3_dimm_micron_sim xil_defaultlib.ddr3_dimm_micron_sim xil_defaultlib.glbl -log elaborate.log
|
||||
}
|
||||
|
||||
# RUN_STEP: <simulate>
|
||||
simulate()
|
||||
{
|
||||
xsim ddr3_dimm_micron_sim -key {Behavioral:sim_1:Functional:ddr3_dimm_micron_sim} -tclbatch cmd.tcl -log simulate.log
|
||||
}
|
||||
|
||||
# STEP: setup
|
||||
setup()
|
||||
{
|
||||
case $1 in
|
||||
"-lib_map_path" )
|
||||
if [[ ($2 == "") ]]; then
|
||||
echo -e "ERROR: Simulation library directory path not specified (type \"./ddr3_dimm_micron_sim.sh -help\" for more information)\n"
|
||||
exit 1
|
||||
fi
|
||||
;;
|
||||
"-reset_run" )
|
||||
reset_run
|
||||
echo -e "INFO: Simulation run files deleted.\n"
|
||||
exit 0
|
||||
;;
|
||||
"-noclean_files" )
|
||||
# do not remove previous data
|
||||
;;
|
||||
* )
|
||||
esac
|
||||
|
||||
# Add any setup/initialization commands here:-
|
||||
|
||||
# <user specific commands>
|
||||
|
||||
}
|
||||
|
||||
# Delete generated data from the previous run
|
||||
reset_run()
|
||||
{
|
||||
files_to_remove=(xelab.pb xsim.jou xvhdl.log xvlog.log compile.log elaborate.log simulate.log xelab.log xsim.log run.log xvhdl.pb xvlog.pb ddr3_dimm_micron_sim.wdb xsim.dir)
|
||||
for (( i=0; i<${#files_to_remove[*]}; i++ )); do
|
||||
file="${files_to_remove[i]}"
|
||||
if [[ -e $file ]]; then
|
||||
rm -rf $file
|
||||
fi
|
||||
done
|
||||
}
|
||||
|
||||
# Check command line arguments
|
||||
check_args()
|
||||
{
|
||||
if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then
|
||||
echo -e "ERROR: Unknown option specified '$2' (type \"./ddr3_dimm_micron_sim.sh -help\" for more information)\n"
|
||||
exit 1
|
||||
fi
|
||||
|
||||
if [[ ($2 == "-help" || $2 == "-h") ]]; then
|
||||
usage
|
||||
fi
|
||||
}
|
||||
|
||||
# Script usage
|
||||
usage()
|
||||
{
|
||||
msg="Usage: ddr3_dimm_micron_sim.sh [-help]\n\
|
||||
Usage: ddr3_dimm_micron_sim.sh [-lib_map_path]\n\
|
||||
Usage: ddr3_dimm_micron_sim.sh [-reset_run]\n\
|
||||
Usage: ddr3_dimm_micron_sim.sh [-noclean_files]\n\n\
|
||||
[-help] -- Print help information for this script\n\n\
|
||||
[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\
|
||||
using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\
|
||||
[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\
|
||||
from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\
|
||||
-noclean_files switch.\n\n\
|
||||
[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n"
|
||||
echo -e $msg
|
||||
exit 1
|
||||
}
|
||||
|
||||
# Launch script
|
||||
run $1 $2
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
verilog xil_defaultlib --include "../" \
|
||||
"../../rtl/ddr3_controller.v" \
|
||||
"../../rtl/ddr3_phy.v" \
|
||||
"../../rtl/ddr3_top.v" \
|
||||
|
||||
sv xil_defaultlib --include "../" \
|
||||
"../ddr3.sv" \
|
||||
"../../rtl/ecc/ecc_dec.sv" \
|
||||
"../../rtl/ecc/ecc_enc.sv" \
|
||||
"../ddr3_dimm_micron_sim.sv" \
|
||||
"../ddr3_module.sv" \
|
||||
|
||||
verilog xil_defaultlib "glbl.v"
|
||||
|
||||
nosort
|
||||
|
|
@ -0,0 +1 @@
|
|||
xil_defaultlib=xsim.dir/xil_defaultlib
|
||||
Loading…
Reference in New Issue