209 lines
8.5 KiB
C++
209 lines
8.5 KiB
C++
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// Verilated -*- C++ -*-
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// DESCRIPTION: Verilator output: Model implementation (design independent parts)
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#include "Vmain.h"
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#include "Vmain__Syms.h"
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#include "verilated_vcd_c.h"
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#include "verilated_dpi.h"
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//============================================================
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// Constructors
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Vmain::Vmain(VerilatedContext* _vcontextp__, const char* _vcname__)
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: VerilatedModel{*_vcontextp__}
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, vlSymsp{new Vmain__Syms(contextp(), _vcname__, this)}
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, i_clk{vlSymsp->TOP.i_clk}
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, i_reset{vlSymsp->TOP.i_reset}
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, i_ddr3_controller_idelayctrl_rdy{vlSymsp->TOP.i_ddr3_controller_idelayctrl_rdy}
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, o_ddr3_controller_dqs_tri_control{vlSymsp->TOP.o_ddr3_controller_dqs_tri_control}
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, o_ddr3_controller_dq_tri_control{vlSymsp->TOP.o_ddr3_controller_dq_tri_control}
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, o_ddr3_controller_toggle_dqs{vlSymsp->TOP.o_ddr3_controller_toggle_dqs}
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, o_ddr3_controller_odelay_data_cntvaluein{vlSymsp->TOP.o_ddr3_controller_odelay_data_cntvaluein}
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, o_ddr3_controller_odelay_dqs_cntvaluein{vlSymsp->TOP.o_ddr3_controller_odelay_dqs_cntvaluein}
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, o_ddr3_controller_idelay_data_cntvaluein{vlSymsp->TOP.o_ddr3_controller_idelay_data_cntvaluein}
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, o_ddr3_controller_idelay_dqs_cntvaluein{vlSymsp->TOP.o_ddr3_controller_idelay_dqs_cntvaluein}
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, o_ddr3_controller_odelay_data_ld{vlSymsp->TOP.o_ddr3_controller_odelay_data_ld}
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, o_ddr3_controller_odelay_dqs_ld{vlSymsp->TOP.o_ddr3_controller_odelay_dqs_ld}
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, o_ddr3_controller_idelay_data_ld{vlSymsp->TOP.o_ddr3_controller_idelay_data_ld}
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, o_ddr3_controller_idelay_dqs_ld{vlSymsp->TOP.o_ddr3_controller_idelay_dqs_ld}
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, o_ddr3_controller_bitslip{vlSymsp->TOP.o_ddr3_controller_bitslip}
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, o_sirefclk_word{vlSymsp->TOP.o_sirefclk_word}
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, o_sirefclk_ce{vlSymsp->TOP.o_sirefclk_ce}
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, i_fan_sda{vlSymsp->TOP.i_fan_sda}
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, i_fan_scl{vlSymsp->TOP.i_fan_scl}
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, o_fan_sda{vlSymsp->TOP.o_fan_sda}
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, o_fan_scl{vlSymsp->TOP.o_fan_scl}
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, o_fpga_pwm{vlSymsp->TOP.o_fpga_pwm}
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, o_sys_pwm{vlSymsp->TOP.o_sys_pwm}
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, i_fan_tach{vlSymsp->TOP.i_fan_tach}
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, o_emmc_clk{vlSymsp->TOP.o_emmc_clk}
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, i_emmc_ds{vlSymsp->TOP.i_emmc_ds}
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, io_emmc_cmd_tristate{vlSymsp->TOP.io_emmc_cmd_tristate}
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, o_emmc_cmd{vlSymsp->TOP.o_emmc_cmd}
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, i_emmc_cmd{vlSymsp->TOP.i_emmc_cmd}
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, io_emmc_dat_tristate{vlSymsp->TOP.io_emmc_dat_tristate}
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, o_emmc_dat{vlSymsp->TOP.o_emmc_dat}
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, i_emmc_dat{vlSymsp->TOP.i_emmc_dat}
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, i_emmc_detect{vlSymsp->TOP.i_emmc_detect}
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, i_i2c_sda{vlSymsp->TOP.i_i2c_sda}
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, i_i2c_scl{vlSymsp->TOP.i_i2c_scl}
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, o_i2c_sda{vlSymsp->TOP.o_i2c_sda}
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, o_i2c_scl{vlSymsp->TOP.o_i2c_scl}
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, o_sdcard_clk{vlSymsp->TOP.o_sdcard_clk}
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, i_sdcard_ds{vlSymsp->TOP.i_sdcard_ds}
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, io_sdcard_cmd_tristate{vlSymsp->TOP.io_sdcard_cmd_tristate}
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, o_sdcard_cmd{vlSymsp->TOP.o_sdcard_cmd}
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, i_sdcard_cmd{vlSymsp->TOP.i_sdcard_cmd}
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, io_sdcard_dat_tristate{vlSymsp->TOP.io_sdcard_dat_tristate}
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, o_sdcard_dat{vlSymsp->TOP.o_sdcard_dat}
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, i_sdcard_dat{vlSymsp->TOP.i_sdcard_dat}
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, i_sdcard_detect{vlSymsp->TOP.i_sdcard_detect}
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, cpu_sim_cyc{vlSymsp->TOP.cpu_sim_cyc}
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, cpu_sim_stb{vlSymsp->TOP.cpu_sim_stb}
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, cpu_sim_we{vlSymsp->TOP.cpu_sim_we}
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, cpu_sim_addr{vlSymsp->TOP.cpu_sim_addr}
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, cpu_sim_stall{vlSymsp->TOP.cpu_sim_stall}
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, cpu_sim_ack{vlSymsp->TOP.cpu_sim_ack}
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, cpu_prof_stb{vlSymsp->TOP.cpu_prof_stb}
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, i_cpu_reset{vlSymsp->TOP.i_cpu_reset}
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, i_clk200{vlSymsp->TOP.i_clk200}
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, i_wbu_uart_rx{vlSymsp->TOP.i_wbu_uart_rx}
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, o_wbu_uart_tx{vlSymsp->TOP.o_wbu_uart_tx}
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, o_wbu_uart_cts_n{vlSymsp->TOP.o_wbu_uart_cts_n}
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, o_gpio{vlSymsp->TOP.o_gpio}
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, i_sw{vlSymsp->TOP.i_sw}
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, i_btn{vlSymsp->TOP.i_btn}
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, o_led{vlSymsp->TOP.o_led}
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, i_gpio{vlSymsp->TOP.i_gpio}
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, i_ddr3_controller_iserdes_data{vlSymsp->TOP.i_ddr3_controller_iserdes_data}
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, o_ddr3_controller_cmd{vlSymsp->TOP.o_ddr3_controller_cmd}
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, o_ddr3_controller_data{vlSymsp->TOP.o_ddr3_controller_data}
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, cpu_sim_data{vlSymsp->TOP.cpu_sim_data}
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, cpu_sim_idata{vlSymsp->TOP.cpu_sim_idata}
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, cpu_prof_addr{vlSymsp->TOP.cpu_prof_addr}
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, cpu_prof_ticks{vlSymsp->TOP.cpu_prof_ticks}
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, i_ddr3_controller_iserdes_dqs{vlSymsp->TOP.i_ddr3_controller_iserdes_dqs}
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, i_ddr3_controller_iserdes_bitslip_reference{vlSymsp->TOP.i_ddr3_controller_iserdes_bitslip_reference}
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, o_ddr3_controller_dm{vlSymsp->TOP.o_ddr3_controller_dm}
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, rootp{&(vlSymsp->TOP)}
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{
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// Register model with the context
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contextp()->addModel(this);
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}
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Vmain::Vmain(const char* _vcname__)
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: Vmain(Verilated::threadContextp(), _vcname__)
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{
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}
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//============================================================
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// Destructor
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Vmain::~Vmain() {
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delete vlSymsp;
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}
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//============================================================
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// Evaluation function
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#ifdef VL_DEBUG
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void Vmain___024root___eval_debug_assertions(Vmain___024root* vlSelf);
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#endif // VL_DEBUG
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void Vmain___024root___eval_static(Vmain___024root* vlSelf);
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void Vmain___024root___eval_initial(Vmain___024root* vlSelf);
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void Vmain___024root___eval_settle(Vmain___024root* vlSelf);
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void Vmain___024root___eval(Vmain___024root* vlSelf);
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void Vmain::eval_step() {
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VL_DEBUG_IF(VL_DBG_MSGF("+++++TOP Evaluate Vmain::eval_step\n"); );
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#ifdef VL_DEBUG
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// Debug assertions
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Vmain___024root___eval_debug_assertions(&(vlSymsp->TOP));
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#endif // VL_DEBUG
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vlSymsp->__Vm_activity = true;
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vlSymsp->__Vm_deleter.deleteAll();
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if (VL_UNLIKELY(!vlSymsp->__Vm_didInit)) {
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vlSymsp->__Vm_didInit = true;
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VL_DEBUG_IF(VL_DBG_MSGF("+ Initial\n"););
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Vmain___024root___eval_static(&(vlSymsp->TOP));
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Vmain___024root___eval_initial(&(vlSymsp->TOP));
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Vmain___024root___eval_settle(&(vlSymsp->TOP));
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}
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// MTask 0 start
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VL_DEBUG_IF(VL_DBG_MSGF("MTask0 starting\n"););
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Verilated::mtaskId(0);
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VL_DEBUG_IF(VL_DBG_MSGF("+ Eval\n"););
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Vmain___024root___eval(&(vlSymsp->TOP));
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// Evaluate cleanup
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Verilated::endOfThreadMTask(vlSymsp->__Vm_evalMsgQp);
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Verilated::endOfEval(vlSymsp->__Vm_evalMsgQp);
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}
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//============================================================
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// Events and timing
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bool Vmain::eventsPending() { return false; }
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uint64_t Vmain::nextTimeSlot() {
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VL_FATAL_MT(__FILE__, __LINE__, "", "%Error: No delays in the design");
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return 0;
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}
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//============================================================
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// Utilities
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const char* Vmain::name() const {
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return vlSymsp->name();
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}
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//============================================================
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// Invoke final blocks
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void Vmain___024root___eval_final(Vmain___024root* vlSelf);
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VL_ATTR_COLD void Vmain::final() {
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Vmain___024root___eval_final(&(vlSymsp->TOP));
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}
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//============================================================
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// Implementations of abstract methods from VerilatedModel
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const char* Vmain::hierName() const { return vlSymsp->name(); }
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const char* Vmain::modelName() const { return "Vmain"; }
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unsigned Vmain::threads() const { return 1; }
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std::unique_ptr<VerilatedTraceConfig> Vmain::traceConfig() const {
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return std::unique_ptr<VerilatedTraceConfig>{new VerilatedTraceConfig{false, false, false}};
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};
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//============================================================
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// Trace configuration
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void Vmain___024root__trace_init_top(Vmain___024root* vlSelf, VerilatedVcd* tracep);
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VL_ATTR_COLD static void trace_init(void* voidSelf, VerilatedVcd* tracep, uint32_t code) {
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// Callback from tracep->open()
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Vmain___024root* const __restrict vlSelf VL_ATTR_UNUSED = static_cast<Vmain___024root*>(voidSelf);
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Vmain__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
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if (!vlSymsp->_vm_contextp__->calcUnusedSigs()) {
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VL_FATAL_MT(__FILE__, __LINE__, __FILE__,
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"Turning on wave traces requires Verilated::traceEverOn(true) call before time 0.");
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}
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vlSymsp->__Vm_baseCode = code;
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tracep->scopeEscape(' ');
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tracep->pushNamePrefix(std::string{vlSymsp->name()} + ' ');
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Vmain___024root__trace_init_top(vlSelf, tracep);
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tracep->popNamePrefix();
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tracep->scopeEscape('.');
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}
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VL_ATTR_COLD void Vmain___024root__trace_register(Vmain___024root* vlSelf, VerilatedVcd* tracep);
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VL_ATTR_COLD void Vmain::trace(VerilatedVcdC* tfp, int levels, int options) {
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if (tfp->isOpen()) {
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vl_fatal(__FILE__, __LINE__, __FILE__,"'Vmain::trace()' shall not be called after 'VerilatedVcdC::open()'.");
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}
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if (false && levels && options) {} // Prevent unused
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tfp->spTrace()->addModel(this);
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tfp->spTrace()->addInitCb(&trace_init, &(vlSymsp->TOP));
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Vmain___024root__trace_register(&(vlSymsp->TOP), tfp->spTrace());
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}
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