2023-07-24 11:33:56 +02:00
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# run verilator lint
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echo -e "\e[32mRun Verilator Lint:\e[0m"
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verilator --lint-only ddr3_top.v -Irtl/
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# run yosys compile
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echo ""
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echo ""
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echo -e "\e[32mRun Yosys Compile:\e[0m"
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yosys -q -p "
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read_verilog -sv ./rtl/ddr3_controller.v;
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synth -top ddr3_controller"
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# run iverilog compile
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echo ""
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echo ""
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echo -e "\e[32mRun IVerilog Compile:\e[0m"
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iverilog rtl/ddr3_controller.v -o out
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vvp out
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rm out
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echo
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# run symbiyosys
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echo ""
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echo -e "\e[32mRun Symbiyosys Formal Verification:\e[0m"
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echo "---------------------------------------"
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2023-11-18 06:36:29 +01:00
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sby -f ddr3.sby
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# ANSI color codes
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RED='\033[0;31m'
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GREEN='\033[0;32m'
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NC='\033[0m' # No Color
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2023-11-26 06:35:59 +01:00
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echo ""
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echo ""
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echo "Summary:"
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2023-11-18 06:36:29 +01:00
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# Iterate over folders starting with 'ddr3*'
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for folder in ddr3*/ ; do
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# Check if the 'PASS' file exists in the folder
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if [[ -e "${folder}PASS" ]]; then
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# Print the folder name and 'PASS' in green
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echo -e "${folder}: ${GREEN}PASS${NC}"
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else
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# Print the folder name and 'FAIL' in red
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echo -e "${folder}: ${RED}FAIL${NC}"
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fi
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done
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2023-07-24 11:33:56 +02:00
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