190 lines
6.4 KiB
Plaintext
190 lines
6.4 KiB
Plaintext
Warning: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 13178, timing group from output port.
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Warning: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 13211, timing group from output port.
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Warning: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 13244, timing group from output port.
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Warning: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 13277, timing group from output port.
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Warning: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 13310, timing group from output port.
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Warning: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 13343, timing group from output port.
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Warning: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 13376, timing group from output port.
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Warning: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 14772, timing group from output port.
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Warning: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 14805, timing group from output port.
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Warning: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 14838, timing group from output port.
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PASS: read 6 libraries
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PASS: link design
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--- glob matching ---
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glob *: 767 cells
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glob INV_*: 6 cells
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glob BUF_*: 6 cells
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glob DFF*: 17 cells
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glob *NAND*: 21 cells
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glob *NOR*: 25 cells
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glob sky130 inv: 7 cells
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glob sky130 buf: 7 cells
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glob sky130 dfxtp: 3 cells
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glob ASAP7 INV: 11 cells
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glob ASAP7 BUF: 12 cells
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glob IHP inv: 5 cells
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glob IHP buf: 5 cells
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glob NONEXISTENT: 0 cells
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PASS: glob matching
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--- regex matching ---
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regex INV_Xn: 6 cells
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regex BUF_Xn: 6 cells
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regex NANDn: 9 cells
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regex .*inv.*: 38 cells
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regex DFF: 25 cells
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regex sky130: 428 cells
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PASS: regex matching
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--- nocase matching ---
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nocase inv_*: 0 cells
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nocase buf_*: 0 cells
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nocase dff*: 0 cells
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PASS: nocase matching
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--- liberty cell/port matching ---
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lib INV: 6
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find_liberty: NangateOpenCellLibrary
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find_liberty: sky130_fd_sc_hd__tt_025C_1v80
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PASS: liberty cell/port matching
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--- design queries ---
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r1: ref=DFF_X1 fn=r1
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r2: ref=DFF_X1 fn=r2
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r3: ref=DFF_X1 fn=r3
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u1: ref=BUF_X1 fn=u1
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u2: ref=AND2_X1 fn=u2
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PASS: instance queries
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r1/D: dir=input fn=r1/D
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r1/CK: dir=input fn=r1/CK
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r1/Q: dir=output fn=r1/Q
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u1/A: dir=input fn=u1/A
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u1/Z: dir=output fn=u1/Z
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u2/A1: dir=input fn=u2/A1
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u2/A2: dir=input fn=u2/A2
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u2/ZN: dir=output fn=u2/ZN
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PASS: pin queries
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net r1q: 2 pins
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net r2q: 2 pins
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net u1z: 2 pins
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net u2z: 2 pins
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PASS: net queries
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--- timing ---
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Warning: network_find_cells_regex.tcl line 1, report_checks -endpoint_count is deprecated. Use -endpoint_path_count instead.
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Startpoint: r2 (rising edge-triggered flip-flop clocked by clk)
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Endpoint: r3 (rising edge-triggered flip-flop clocked by clk)
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Path Group: clk
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 ^ r2/CK (DFF_X1)
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0.08 0.08 v r2/Q (DFF_X1)
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0.02 0.10 v u1/Z (BUF_X1)
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0.03 0.13 v u2/ZN (AND2_X1)
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0.00 0.13 v r3/D (DFF_X1)
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0.13 data arrival time
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10.00 10.00 clock clk (rise edge)
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0.00 10.00 clock network delay (ideal)
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0.00 10.00 clock reconvergence pessimism
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10.00 ^ r3/CK (DFF_X1)
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-0.04 9.96 library setup time
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9.96 data required time
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---------------------------------------------------------
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9.96 data required time
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-0.13 data arrival time
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---------------------------------------------------------
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9.83 slack (MET)
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Startpoint: r2 (rising edge-triggered flip-flop clocked by clk)
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Endpoint: r3 (rising edge-triggered flip-flop clocked by clk)
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Path Group: clk
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 ^ r2/CK (DFF_X1)
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0.08 0.08 ^ r2/Q (DFF_X1)
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0.02 0.10 ^ u1/Z (BUF_X1)
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0.03 0.13 ^ u2/ZN (AND2_X1)
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0.00 0.13 ^ r3/D (DFF_X1)
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0.13 data arrival time
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10.00 10.00 clock clk (rise edge)
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0.00 10.00 clock network delay (ideal)
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0.00 10.00 clock reconvergence pessimism
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10.00 ^ r3/CK (DFF_X1)
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-0.03 9.97 library setup time
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9.97 data required time
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---------------------------------------------------------
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9.97 data required time
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-0.13 data arrival time
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---------------------------------------------------------
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9.84 slack (MET)
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Startpoint: r1 (rising edge-triggered flip-flop clocked by clk)
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Endpoint: r3 (rising edge-triggered flip-flop clocked by clk)
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Path Group: clk
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 ^ r1/CK (DFF_X1)
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0.08 0.08 ^ r1/Q (DFF_X1)
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0.03 0.11 ^ u2/ZN (AND2_X1)
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0.00 0.11 ^ r3/D (DFF_X1)
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0.11 data arrival time
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10.00 10.00 clock clk (rise edge)
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0.00 10.00 clock network delay (ideal)
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0.00 10.00 clock reconvergence pessimism
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10.00 ^ r3/CK (DFF_X1)
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-0.03 9.97 library setup time
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9.97 data required time
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---------------------------------------------------------
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9.97 data required time
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-0.11 data arrival time
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---------------------------------------------------------
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9.86 slack (MET)
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PASS: timing
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Startpoint: in1 (input port clocked by clk)
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Endpoint: r1 (rising edge-triggered flip-flop clocked by clk)
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Path Group: clk
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Path Type: min
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 v input external delay
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0.00 0.00 v in1 (in)
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0.00 0.00 v r1/D (DFF_X1)
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0.00 data arrival time
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 clock reconvergence pessimism
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0.00 ^ r1/CK (DFF_X1)
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0.05 0.05 library hold time
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0.05 data required time
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---------------------------------------------------------
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0.05 data required time
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-0.00 data arrival time
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---------------------------------------------------------
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-0.05 slack (VIOLATED)
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PASS: min path
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No paths found.
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PASS: in1->out
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No paths found.
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PASS: in2->out
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ALL PASSED
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