f192996a42
Upstream added bias pin type recognition, changing VNB/VPB pin direction from "unknown" to "bias" in liberty output. Update 9 golden .ok files to match. Co-Authored-By: Claude <noreply@anthropic.com> Signed-off-by: Jaehyun Kim <jhkim@precisioninno.com> |
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| .. | ||
| test | ||
| Verilog.i | ||
| Verilog.tcl | ||
| VerilogLex.ll | ||
| VerilogParse.yy | ||
| VerilogReader.cc | ||
| VerilogReaderPvt.hh | ||
| VerilogScanner.hh | ||
| VerilogWriter.cc | ||