143 lines
5.2 KiB
Tcl
143 lines
5.2 KiB
Tcl
# Test data check constraints, gated clock paths, recovery/removal,
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# PathEndDataCheck, PathEndGatedClock reporting.
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# Targets: ReportPath.cc reportShort/reportFull/reportEndpoint for
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# PathEndDataCheck, PathEndGatedClock, PathEnd.cc PathEndDataCheck,
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# PathEndGatedClock, Genclks.cc, GatedClk.cc, ClkSkew.cc
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source ../../test/helpers.tcl
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read_liberty ../../test/nangate45/Nangate45_typ.lib
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read_verilog search_data_check_gated.v
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link_design search_data_check_gated
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create_clock -name clk -period 10 [get_ports clk]
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set_input_delay -clock clk 1.0 [get_ports in1]
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set_input_delay -clock clk 1.0 [get_ports in2]
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set_input_delay -clock clk 0.5 [get_ports en]
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set_input_delay -clock clk 0.5 [get_ports rst]
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set_output_delay -clock clk 2.0 [get_ports out1]
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set_output_delay -clock clk 2.0 [get_ports out2]
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set_output_delay -clock clk 2.0 [get_ports out3]
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puts "--- Basic timing ---"
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report_checks -path_delay max
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report_checks -path_delay min
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puts "--- Enable gated clock checks ---"
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sta::set_gated_clk_checks_enabled 1
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report_checks -path_delay max -format full_clock_expanded
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report_checks -path_delay min -format full_clock_expanded
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puts "--- find_timing_paths with gated clk ---"
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set paths [find_timing_paths -path_delay max -endpoint_path_count 10 -group_path_count 20]
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puts "Found [llength $paths] max paths"
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foreach pe $paths {
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puts " is_gated: [$pe is_gated_clock] is_check: [$pe is_check] pin=[get_full_name [$pe pin]] role=[$pe check_role] slack=[$pe slack]"
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}
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puts "--- report_checks in various formats with gated clk ---"
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report_checks -path_delay max -format full
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report_checks -path_delay max -format full_clock
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report_checks -path_delay max -format short
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report_checks -path_delay max -format end
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report_checks -path_delay max -format summary
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report_checks -path_delay max -format slack_only
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report_checks -path_delay max -format json
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puts "--- propagate_gated_clock_enable ---"
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sta::set_propagate_gated_clock_enable 1
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report_checks -path_delay max
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report_checks -path_delay min
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sta::set_propagate_gated_clock_enable 0
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sta::set_gated_clk_checks_enabled 0
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puts "--- Enable recovery/removal checks ---"
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sta::set_recovery_removal_checks_enabled 1
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report_checks -path_delay max -format full_clock_expanded
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report_checks -path_delay min -format full_clock_expanded
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puts "--- find_timing_paths with recovery/removal ---"
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set paths_rr [find_timing_paths -path_delay max -endpoint_path_count 15 -group_path_count 30]
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puts "Found [llength $paths_rr] paths with recovery/removal"
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foreach pe $paths_rr {
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set role [$pe check_role]
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puts " role=$role is_check=[$pe is_check] pin=[get_full_name [$pe pin]] slack=[$pe slack]"
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}
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puts "--- report recovery/removal in formats ---"
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report_checks -path_delay max -format full
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report_checks -path_delay max -format json
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report_checks -path_delay min -format full_clock
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sta::set_recovery_removal_checks_enabled 0
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puts "--- Data check constraints ---"
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set_data_check -from [get_pins reg1/CK] -to [get_pins reg2/D] -setup 0.2
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set_data_check -from [get_pins reg1/CK] -to [get_pins reg2/D] -hold 0.1
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report_checks -path_delay max -format full_clock_expanded
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report_checks -path_delay min -format full_clock_expanded
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puts "data_check applied"
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puts "--- find_timing_paths with data check ---"
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set paths_dc [find_timing_paths -path_delay max -endpoint_path_count 10]
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puts "Found [llength $paths_dc] paths with data check"
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foreach pe $paths_dc {
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puts " is_data_check: [$pe is_data_check] pin=[get_full_name [$pe pin]] role=[$pe check_role]"
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}
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puts "--- clock skew analysis ---"
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report_clock_skew -setup
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report_clock_skew -hold
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report_clock_skew -setup -include_internal_latency
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report_clock_skew -hold -include_internal_latency
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report_clock_skew -setup -digits 6
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report_clock_skew -hold -digits 6
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puts "--- clock latency ---"
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report_clock_latency
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report_clock_latency -include_internal_latency
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report_clock_latency -digits 6
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puts "--- worst_clk_skew_cmd ---"
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set ws_setup [sta::worst_clk_skew_cmd setup 0]
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puts "Worst skew setup: $ws_setup"
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set ws_hold [sta::worst_clk_skew_cmd hold 0]
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puts "Worst skew hold: $ws_hold"
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set ws_setup_int [sta::worst_clk_skew_cmd setup 1]
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puts "Worst skew setup (int): $ws_setup_int"
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set ws_hold_int [sta::worst_clk_skew_cmd hold 1]
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puts "Worst skew hold (int): $ws_hold_int"
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puts "--- report_check_types with everything ---"
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report_check_types -verbose
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report_check_types -violators
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puts "--- check_setup ---"
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check_setup -verbose
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check_setup -verbose -no_input_delay
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check_setup -verbose -no_output_delay
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check_setup -verbose -unconstrained_endpoints
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check_setup -verbose -no_clock
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check_setup -verbose -loops
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check_setup -verbose -generated_clocks
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puts "--- clock properties ---"
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report_clock_properties
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report_clock_properties clk
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puts "--- find_timing_paths with -through ---"
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set paths_thru [find_timing_paths -through [get_pins clk_gate/ZN] -path_delay max]
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puts "Paths through clk_gate/ZN: [llength $paths_thru]"
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puts "--- report_checks -through ---"
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report_checks -through [get_pins buf1/Z] -path_delay max
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report_checks -through [get_pins inv1/ZN] -path_delay max
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puts "--- pulse width checks ---"
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report_pulse_width_checks
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report_pulse_width_checks -verbose
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puts "--- min period ---"
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report_clock_min_period
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report_clock_min_period -include_port_paths
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