OpenSTA/verilog
Cho Moon e04e9d1145
made module deletion optional in linkNetwork (#200)
* made module deletion optional in linkNetwork

Signed-off-by: Cho Moon <cmoon@precisioninno.com>

* merged with master

Signed-off-by: Cho Moon <cmoon@precisioninno.com>

---------

Signed-off-by: Cho Moon <cmoon@precisioninno.com>
2025-02-05 13:32:08 -08:00
..
Verilog.i update copyright 2025-01-21 18:54:33 -07:00
Verilog.tcl update copyright 2025-01-21 18:54:33 -07:00
VerilogLex.ll mv VerilogReader.hh to include/sta 2025-01-28 09:11:05 -07:00
VerilogParse.yy LibExpr/spef/saif c++ parsers 2025-02-01 14:49:30 -08:00
VerilogReader.cc made module deletion optional in linkNetwork (#200) 2025-02-05 13:32:08 -08:00
VerilogReader.hh LibExpr/spef/saif c++ parsers 2025-02-01 14:49:30 -08:00
VerilogReaderPvt.hh update copyright 2025-01-21 18:54:33 -07:00
VerilogScanner.hh LibExpr/spef/saif c++ parsers 2025-02-01 14:49:30 -08:00
VerilogWriter.cc update copyright 2025-01-21 18:54:33 -07:00