267 lines
8.3 KiB
C++
267 lines
8.3 KiB
C++
// OpenSTA, Static Timing Analyzer
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// Copyright (c) 2024, Parallax Software, Inc.
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <https://www.gnu.org/licenses/>.
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#pragma once
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#include <functional>
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#include "Vector.hh"
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#include "Map.hh"
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#include "StringUtil.hh"
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#include "NetworkClass.hh"
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// The classes defined in this file are a contrete implementation of
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// the library API. They can be used by a reader to construct classes
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// that implement the library portion of the network API.
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namespace sta {
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class ConcreteLibrary;
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class ConcreteCell;
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class ConcretePort;
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class ConcreteCellPortBitIterator;
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class PatternMatch;
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class LibertyCell;
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class LibertyPort;
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typedef Map<const char*, ConcreteCell*, CharPtrLess> ConcreteCellMap;
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typedef Map<std::string, std::string> AttributeMap;
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typedef Vector<ConcretePort*> ConcretePortSeq;
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typedef Map<const char*, ConcretePort*, CharPtrLess> ConcretePortMap;
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typedef ConcreteCellMap::ConstIterator ConcreteLibraryCellIterator;
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typedef ConcretePortSeq::ConstIterator ConcreteCellPortIterator;
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typedef ConcretePortSeq::ConstIterator ConcretePortMemberIterator;
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class ConcreteLibrary
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{
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public:
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explicit ConcreteLibrary(const char *name,
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const char *filename,
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bool is_liberty);
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virtual ~ConcreteLibrary();
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const char *name() const { return name_; }
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void setName(const char *name);
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ObjectId id() const { return id_; }
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bool isLiberty() const { return is_liberty_; }
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const char *filename() const { return filename_; }
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void addCell(ConcreteCell *cell);
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ConcreteCell *makeCell(const char *name,
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bool is_leaf,
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const char *filename);
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void deleteCell(ConcreteCell *cell);
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ConcreteLibraryCellIterator *cellIterator() const;
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ConcreteCell *findCell(const char *name) const;
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CellSeq findCellsMatching(const PatternMatch *pattern) const;
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char busBrktLeft() const { return bus_brkt_left_; }
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char busBrktRight() const { return bus_brkt_right_; }
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void setBusBrkts(char left,
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char right);
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protected:
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void renameCell(ConcreteCell *cell,
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const char *cell_name);
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const char *name_;
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ObjectId id_;
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const char *filename_;
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bool is_liberty_;
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char bus_brkt_left_;
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char bus_brkt_right_;
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ConcreteCellMap cell_map_;
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private:
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friend class ConcreteCell;
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};
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class ConcreteCell
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{
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public:
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// Use ConcreteLibrary::deleteCell.
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virtual ~ConcreteCell();
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const char *name() const { return name_; }
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ObjectId id() const { return id_; }
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const char *filename() const { return filename_; }
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ConcreteLibrary *library() const { return library_; }
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LibertyCell *libertyCell() const { return liberty_cell_; }
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void setLibertyCell(LibertyCell *cell);
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void *extCell() const { return ext_cell_; }
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void setExtCell(void *ext_cell);
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int portBitCount() const { return port_bit_count_; }
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ConcretePort *findPort(const char *name) const;
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PortSeq findPortsMatching(const PatternMatch *pattern) const;
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ConcreteCellPortIterator *portIterator() const;
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ConcreteCellPortBitIterator *portBitIterator() const;
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bool isLeaf() const { return is_leaf_; }
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void setIsLeaf(bool is_leaf);
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void setAttribute(const std::string &key,
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const std::string &value);
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std::string getAttribute(const std::string &key) const;
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// Cell acts as port factory.
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ConcretePort *makePort(const char *name);
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// Bus port.
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ConcretePort *makeBusPort(const char *name,
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int from_index,
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int to_index);
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// Bundle port.
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ConcretePort *makeBundlePort(const char *name,
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ConcretePortSeq *members);
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// Group previously defined bus bit ports together.
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void groupBusPorts(const char bus_brkt_left,
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const char bus_brkt_right,
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std::function<bool(const char*)> port_msb_first);
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size_t portCount() const;
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void setName(const char *name);
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void addPort(ConcretePort *port);
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void addPortBit(ConcretePort *port);
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protected:
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ConcreteCell(const char *name,
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const char *filename,
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bool is_leaf,
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ConcreteLibrary *library);
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ConcretePort *makeBusPort(const char *name,
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int from_index,
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int to_index,
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ConcretePortSeq *members);
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void makeBusPortBits(ConcretePort *bus_port,
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const char *name,
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int from_index,
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int to_index);
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// Bus port bit (internal to makeBusPortBits).
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ConcretePort *makePort(const char *bit_name,
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int bit_index);
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void makeBusPortBit(ConcretePort *bus_port,
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const char *name,
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int index);
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const char *name_;
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ObjectId id_;
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// Filename is optional.
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const char *filename_;
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ConcreteLibrary *library_;
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LibertyCell *liberty_cell_;
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// External application cell.
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void *ext_cell_;
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// Non-bus and bus ports (but no expanded bus bit ports).
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ConcretePortSeq ports_;
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ConcretePortMap port_map_;
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// Port bit count (expanded buses).
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int port_bit_count_;
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bool is_leaf_;
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AttributeMap attribute_map_;
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private:
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friend class ConcreteLibrary;
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friend class ConcreteCellPortBitIterator;
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};
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class ConcretePort
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{
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public:
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virtual ~ConcretePort();
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const char *name() const { return name_; }
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ObjectId id() const { return id_; }
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const char *busName() const;
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Cell *cell() const;
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ConcreteLibrary *library() const { return cell_->library(); }
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PortDirection *direction() const { return direction_; }
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LibertyPort *libertyPort() const { return liberty_port_; }
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void setLibertyPort(LibertyPort *port);
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// External application port.
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void *extPort() const { return ext_port_; }
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void setExtPort(void *port);
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void setDirection(PortDirection *dir);
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// Bundles are groups of related ports that do not use
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// bus notation.
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bool isBundle() const { return is_bundle_; }
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bool isBus() const { return is_bus_; }
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// Index of cell bit ports.
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// Bus/bundle ports do not have an pin index.
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int pinIndex() const { return pin_index_; }
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void setPinIndex(int index);
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// Size is the bus/bundle member count (1 for non-bus/bundle ports).
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int size() const;
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int fromIndex() const { return from_index_; }
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int toIndex() const { return to_index_; }
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// Bus member, bus[subscript].
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ConcretePort *findBusBit(int index) const;
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// Predicate to determine if subscript is within bus range.
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// (toIndex > fromIndex) && fromIndex <= subscript <= toIndex
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// || (fromIndex > toIndex) && fromIndex >= subscript >= toIndex
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bool busIndexInRange(int index) const;
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// A port has members if it is a bundle or bus.
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bool hasMembers() const;
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ConcretePort *findMember(int index) const;
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ConcretePortMemberIterator *memberIterator() const;
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void setBusBitIndex(int index);
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// Bus bit port functions.
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// Bus bit is one bit of a bus port.
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bool isBusBit() const;
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// Bit index within bus port.
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// The bit index of A[3] is 3.
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int busBitIndex() const { return to_index_; }
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ConcretePortSeq *memberPorts() const { return member_ports_; }
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void addPortBit(ConcretePort *port);
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protected:
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// Constructors for factory in cell class.
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ConcretePort(const char *name,
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bool is_bus,
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int from_index,
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int to_index,
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bool is_bundle,
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ConcretePortSeq *member_ports,
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ConcreteCell *cell);
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const char *name_;
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ObjectId id_;
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ConcreteCell *cell_;
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PortDirection *direction_;
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LibertyPort *liberty_port_;
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// External application port.
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void *ext_port_;
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int pin_index_;
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bool is_bundle_;
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bool is_bus_;
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int from_index_;
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int to_index_;
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// Expanded bus bit ports (ordered by from_index_ to to_index_)
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// or bundle member ports.
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ConcretePortSeq *member_ports_;
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private:
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friend class ConcreteCell;
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};
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class ConcreteCellPortBitIterator : public Iterator<ConcretePort*>
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{
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public:
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explicit ConcreteCellPortBitIterator(const ConcreteCell *cell);
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virtual bool hasNext();
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virtual ConcretePort *next();
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private:
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void findNext();
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ConcretePortSeq::ConstIterator port_iter_;
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ConcretePortMemberIterator *member_iter_;
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ConcretePort *next_;
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};
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} // Namespace
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