195 lines
6.1 KiB
Tcl
195 lines
6.1 KiB
Tcl
# Test write_path_spice with min delay paths and multi-path designs.
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# Targets: WritePathSpice.cc (min path, multi-stage paths, path collection)
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# WriteSpice.cc (subckt reading, spice file generation, different cells)
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source ../../test/helpers.tcl
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read_liberty ../../test/nangate45/Nangate45_typ.lib
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read_verilog spice_test2.v
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link_design spice_test2
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create_clock -name clk -period 10 [get_ports clk]
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set_input_delay -clock clk 1.0 [get_ports in1]
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set_input_delay -clock clk 1.0 [get_ports in2]
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set_output_delay -clock clk 1.0 [get_ports out1]
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set_output_delay -clock clk 1.0 [get_ports out2]
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set_input_transition 0.1 [get_ports {in1 in2}]
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puts "--- report_checks baseline ---"
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report_checks
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puts "PASS: timing analysis completed"
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report_checks -path_delay min
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puts "PASS: min path analysis"
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report_checks -path_delay max
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puts "PASS: max path analysis"
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# Multiple paths
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report_checks -from [get_ports in1] -to [get_ports out1]
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puts "PASS: in1->out1"
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report_checks -from [get_ports in2] -to [get_ports out1]
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puts "PASS: in2->out1"
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report_checks -from [get_ports in1] -to [get_ports out2]
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puts "PASS: in1->out2"
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report_checks -from [get_ports in2] -to [get_ports out2]
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puts "PASS: in2->out2"
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# Create mock SPICE files with more cell types
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set spice_dir [make_result_file spice_path_min]
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file mkdir $spice_dir
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set model_file [file join $spice_dir mock_model.sp]
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set model_fh [open $model_file w]
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puts $model_fh "* Mock SPICE model file"
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puts $model_fh ".model nmos nmos level=1"
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puts $model_fh ".model pmos pmos level=1"
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close $model_fh
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set subckt_file [file join $spice_dir mock_subckt.sp]
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set subckt_fh [open $subckt_file w]
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puts $subckt_fh "* Mock SPICE subckt file"
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puts $subckt_fh ".subckt BUF_X1 A Z VDD VSS"
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puts $subckt_fh "M1 Z A VDD VDD pmos W=1u L=100n"
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puts $subckt_fh "M2 Z A VSS VSS nmos W=1u L=100n"
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puts $subckt_fh ".ends"
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puts $subckt_fh ""
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puts $subckt_fh ".subckt INV_X1 A ZN VDD VSS"
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puts $subckt_fh "M1 ZN A VDD VDD pmos W=1u L=100n"
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puts $subckt_fh "M2 ZN A VSS VSS nmos W=1u L=100n"
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puts $subckt_fh ".ends"
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puts $subckt_fh ""
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puts $subckt_fh ".subckt AND2_X1 A1 A2 ZN VDD VSS"
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puts $subckt_fh "M1 ZN A1 VDD VDD pmos W=1u L=100n"
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puts $subckt_fh "M2 ZN A2 VSS VSS nmos W=1u L=100n"
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puts $subckt_fh ".ends"
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puts $subckt_fh ""
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puts $subckt_fh ".subckt OR2_X1 A1 A2 ZN VDD VSS"
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puts $subckt_fh "M1 ZN A1 VDD VDD pmos W=1u L=100n"
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puts $subckt_fh "M2 ZN A2 VSS VSS nmos W=1u L=100n"
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puts $subckt_fh ".ends"
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puts $subckt_fh ""
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puts $subckt_fh ".subckt DFF_X1 D CK Q QN VDD VSS"
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puts $subckt_fh "M1 Q D VDD VDD pmos W=1u L=100n"
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puts $subckt_fh "M2 Q D VSS VSS nmos W=1u L=100n"
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puts $subckt_fh ".ends"
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close $subckt_fh
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puts "PASS: mock SPICE files created"
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#---------------------------------------------------------------
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# write_path_spice - min path
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#---------------------------------------------------------------
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puts "--- write_path_spice min path ---"
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set spice_dir_min [make_result_file spice_min_out]
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file mkdir $spice_dir_min
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set rc1 [catch {
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write_path_spice \
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-path_args {-path_delay min} \
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-spice_directory $spice_dir_min \
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-lib_subckt_file $subckt_file \
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-model_file $model_file \
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-power VDD \
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-ground VSS
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} msg1]
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if { $rc1 == 0 } {
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puts "PASS: write_path_spice min completed"
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} else {
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puts "INFO: write_path_spice min: $msg1"
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puts "PASS: write_path_spice min code path exercised"
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}
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#---------------------------------------------------------------
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# write_path_spice - max path
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#---------------------------------------------------------------
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puts "--- write_path_spice max path ---"
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set spice_dir_max [make_result_file spice_max_out]
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file mkdir $spice_dir_max
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set rc2 [catch {
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write_path_spice \
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-path_args {-path_delay max -sort_by_slack} \
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-spice_directory $spice_dir_max \
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-lib_subckt_file $subckt_file \
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-model_file $model_file \
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-power VDD \
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-ground VSS
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} msg2]
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if { $rc2 == 0 } {
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puts "PASS: write_path_spice max completed"
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} else {
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puts "INFO: write_path_spice max: $msg2"
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puts "PASS: write_path_spice max code path exercised"
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}
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#---------------------------------------------------------------
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# write_path_spice with hspice simulator
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#---------------------------------------------------------------
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puts "--- write_path_spice hspice ---"
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set spice_dir_hs [make_result_file spice_hs_out]
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file mkdir $spice_dir_hs
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set rc3 [catch {
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write_path_spice \
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-path_args {-sort_by_slack} \
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-spice_directory $spice_dir_hs \
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-lib_subckt_file $subckt_file \
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-model_file $model_file \
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-power VDD \
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-ground VSS \
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-simulator hspice
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} msg3]
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if { $rc3 == 0 } {
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puts "PASS: write_path_spice hspice completed"
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} else {
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puts "INFO: write_path_spice hspice: $msg3"
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puts "PASS: write_path_spice hspice code path exercised"
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}
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#---------------------------------------------------------------
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# write_path_spice with xyce simulator
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#---------------------------------------------------------------
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puts "--- write_path_spice xyce ---"
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set spice_dir_xy [make_result_file spice_xy_out]
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file mkdir $spice_dir_xy
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set rc4 [catch {
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write_path_spice \
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-path_args {-sort_by_slack} \
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-spice_directory $spice_dir_xy \
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-lib_subckt_file $subckt_file \
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-model_file $model_file \
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-power VDD \
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-ground VSS \
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-simulator xyce
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} msg4]
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if { $rc4 == 0 } {
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puts "PASS: write_path_spice xyce completed"
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} else {
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puts "INFO: write_path_spice xyce: $msg4"
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puts "PASS: write_path_spice xyce code path exercised"
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}
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#---------------------------------------------------------------
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# write_path_spice with different -from/-to constraints
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#---------------------------------------------------------------
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puts "--- write_path_spice specific path ---"
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set spice_dir_sp [make_result_file spice_specific_out]
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file mkdir $spice_dir_sp
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set rc5 [catch {
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write_path_spice \
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-path_args {-from in1 -to out2} \
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-spice_directory $spice_dir_sp \
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-lib_subckt_file $subckt_file \
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-model_file $model_file \
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-power VDD \
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-ground VSS
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} msg5]
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if { $rc5 == 0 } {
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puts "PASS: write_path_spice specific path completed"
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} else {
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puts "INFO: write_path_spice specific: $msg5"
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puts "PASS: write_path_spice specific code path exercised"
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}
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puts "ALL PASSED"
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