88 lines
2.8 KiB
Tcl
88 lines
2.8 KiB
Tcl
# Test Crpr.cc - Clock Reconvergence Pessimism Removal
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read_liberty ../../test/nangate45/Nangate45_typ.lib
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read_verilog search_crpr.v
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link_design search_crpr
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create_clock -name clk -period 10 [get_ports clk]
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set_propagated_clock [get_clocks clk]
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set_input_delay -clock clk 1.0 [get_ports in1]
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set_input_delay -clock clk 1.0 [get_ports in2]
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set_output_delay -clock clk 2.0 [get_ports out1]
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# Add clock uncertainty to trigger CRPR paths
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set_clock_uncertainty 0.5 -setup [get_clocks clk]
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set_clock_uncertainty 0.3 -hold [get_clocks clk]
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# Add timing derate for early/late
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set_timing_derate -early 0.95
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set_timing_derate -late 1.05
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puts "--- CRPR with propagated clock, setup ---"
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report_checks -path_delay max -format full_clock_expanded
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puts "PASS: CRPR setup path"
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puts "--- CRPR with propagated clock, hold ---"
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report_checks -path_delay min -format full_clock_expanded
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puts "PASS: CRPR hold path"
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puts "--- report_checks full_clock ---"
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report_checks -path_delay max -format full_clock
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puts "PASS: CRPR full_clock format"
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puts "--- report_checks between reg1 and reg2 ---"
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report_checks -from [get_pins reg1/CK] -to [get_pins reg2/D] -path_delay max -format full_clock_expanded
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puts "PASS: CRPR reg-to-reg path"
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puts "--- report_checks min between reg1 and reg2 ---"
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report_checks -from [get_pins reg1/CK] -to [get_pins reg2/D] -path_delay min -format full_clock_expanded
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puts "PASS: CRPR reg-to-reg hold path"
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puts "--- report_clock_skew ---"
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report_clock_skew -setup
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report_clock_skew -hold
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puts "PASS: CRPR clock skew"
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puts "--- report_clock_latency ---"
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report_clock_latency
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puts "PASS: CRPR clock latency"
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puts "--- check CRPR mode settings ---"
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puts "CRPR enabled: [sta::crpr_enabled]"
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sta::set_crpr_enabled 1
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puts "CRPR mode: [sta::crpr_mode]"
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sta::set_crpr_mode "same_pin"
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puts "CRPR mode after set: [sta::crpr_mode]"
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report_checks -path_delay max -format full_clock_expanded
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sta::set_crpr_mode "same_transition"
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puts "CRPR mode after set: [sta::crpr_mode]"
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report_checks -path_delay max -format full_clock_expanded
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puts "PASS: CRPR mode settings"
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puts "--- CRPR disabled ---"
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sta::set_crpr_enabled 0
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report_checks -path_delay max -format full_clock_expanded
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sta::set_crpr_enabled 1
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puts "PASS: CRPR disable/enable"
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puts "--- find_timing_paths with CRPR ---"
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set paths [find_timing_paths -path_delay max -endpoint_path_count 3]
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puts "Found [llength $paths] paths with CRPR"
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foreach pe $paths {
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puts " slack=[$pe slack] crpr=[$pe check_crpr]"
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}
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puts "PASS: find_timing_paths CRPR"
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puts "--- find_timing_paths min with CRPR ---"
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set paths_min [find_timing_paths -path_delay min -endpoint_path_count 3]
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puts "Found [llength $paths_min] hold paths with CRPR"
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foreach pe $paths_min {
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puts " slack=[$pe slack] crpr=[$pe check_crpr]"
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}
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puts "PASS: find_timing_paths min CRPR"
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puts "--- report_check_types ---"
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report_check_types -verbose
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puts "PASS: check_types with CRPR"
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puts "ALL PASSED"
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