42 lines
896 B
Plaintext
42 lines
896 B
Plaintext
PASS: clocks
|
|
PASS: generated clocks
|
|
PASS: IO delays
|
|
PASS: drives
|
|
PASS: input transitions
|
|
PASS: loads
|
|
PASS: net loads
|
|
PASS: clock latency
|
|
PASS: clock uncertainty
|
|
PASS: clock transition
|
|
PASS: propagated
|
|
Warning: sdc_write_roundtrip_full.tcl line 1, set_clock_sense is deprecated as of SDC 2.1. Use set_sense -type clock.
|
|
PASS: clock sense
|
|
PASS: disable timing
|
|
PASS: case analysis
|
|
PASS: logic
|
|
PASS: design limits
|
|
PASS: false paths
|
|
PASS: multicycle paths
|
|
PASS: max/min delay
|
|
PASS: group paths
|
|
PASS: clock groups
|
|
PASS: clock gating check
|
|
PASS: min pulse width
|
|
PASS: latch borrow
|
|
PASS: net resistance
|
|
PASS: data checks
|
|
PASS: operating conditions
|
|
PASS: wire load
|
|
PASS: timing derate
|
|
PASS: constraints set
|
|
PASS: write native
|
|
PASS: write compatible
|
|
PASS: write digits 2
|
|
PASS: write digits 8
|
|
PASS: write map_hpins
|
|
PASS: read native
|
|
PASS: write after read
|
|
PASS: read compatible
|
|
PASS: write final
|
|
ALL PASSED
|