177 lines
6.0 KiB
Tcl
177 lines
6.0 KiB
Tcl
# Test parasitic estimation with set_wire_rc and wireload models
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# Targets: EstimateParasitics.cc (estimatePiElmore, wireload-based estimation)
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# ConcreteParasitics.cc (makeParasiticPi, makeParasiticPiElmore, setPiModel,
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# setElmore, findPiElmore, findElmore, delete operations)
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# ReduceParasitics.cc (parasitic reduction with estimated parasitics)
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# Parasitics.cc (estimate operations, delete parasitics, find parasitics)
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# SpefReader.cc (additional format coverage)
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# Read ASAP7 libraries
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read_liberty ../../test/asap7/asap7sc7p5t_SEQ_RVT_FF_nldm_220123.lib
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read_liberty ../../test/asap7/asap7sc7p5t_INVBUF_RVT_FF_nldm_220122.lib.gz
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read_liberty ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz
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read_liberty ../../test/asap7/asap7sc7p5t_OA_RVT_FF_nldm_211120.lib.gz
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read_liberty ../../test/asap7/asap7sc7p5t_AO_RVT_FF_nldm_211120.lib.gz
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read_verilog ../../test/reg1_asap7.v
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link_design top
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create_clock -name clk -period 500 {clk1 clk2 clk3}
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set_input_delay -clock clk 1 {in1 in2}
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set_output_delay -clock clk 1 [get_ports out]
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set_input_transition 10 {in1 in2 clk1 clk2 clk3}
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set_propagated_clock {clk1 clk2 clk3}
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#---------------------------------------------------------------
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# Baseline without any parasitics
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#---------------------------------------------------------------
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puts "--- baseline ---"
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report_checks
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puts "PASS: baseline"
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report_parasitic_annotation
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puts "PASS: baseline parasitic annotation"
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#---------------------------------------------------------------
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# Set pi model on multiple nets, with varying parameter values
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#---------------------------------------------------------------
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puts "--- set_pi_model with varied parameters ---"
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# Very small parasitics
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catch {sta::set_pi_model u1/Y 0.0001 0.1 0.00005} msg
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puts "set_pi_model u1/Y (small): $msg"
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# Medium parasitics
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catch {sta::set_pi_model u2/Y 0.01 20.0 0.005} msg
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puts "set_pi_model u2/Y (medium): $msg"
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# Large parasitics
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catch {sta::set_pi_model r1/Q 0.05 50.0 0.02} msg
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puts "set_pi_model r1/Q (large): $msg"
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catch {sta::set_pi_model r2/Q 0.03 30.0 0.01} msg
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puts "set_pi_model r2/Q: $msg"
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catch {sta::set_pi_model r3/Q 0.001 2.0 0.001} msg
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puts "set_pi_model r3/Q: $msg"
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#---------------------------------------------------------------
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# Set elmore delays with different values
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#---------------------------------------------------------------
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puts "--- set_elmore varied ---"
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catch {sta::set_elmore u1/Y u2/A 0.0001} msg
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puts "set_elmore u1/Y -> u2/A (small): $msg"
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catch {sta::set_elmore u2/Y r3/D 0.01} msg
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puts "set_elmore u2/Y -> r3/D (medium): $msg"
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catch {sta::set_elmore r1/Q u1/A 0.05} msg
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puts "set_elmore r1/Q -> u1/A (large): $msg"
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catch {sta::set_elmore r2/Q u2/B 0.02} msg
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puts "set_elmore r2/Q -> u2/B: $msg"
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catch {sta::set_elmore r3/Q out 0.001} msg
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puts "set_elmore r3/Q -> out: $msg"
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#---------------------------------------------------------------
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# Report with estimated parasitics
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#---------------------------------------------------------------
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puts "--- timing with varied parasitics ---"
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report_checks
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puts "PASS: report_checks with varied parasitics"
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report_checks -path_delay min
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puts "PASS: min path"
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report_checks -path_delay max
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puts "PASS: max path"
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report_checks -fields {slew cap input_pins nets fanout}
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puts "PASS: report with fields"
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#---------------------------------------------------------------
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# Try different delay calculators with these parasitics
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#---------------------------------------------------------------
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puts "--- arnoldi with estimated ---"
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set_delay_calculator arnoldi
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report_checks
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puts "PASS: arnoldi"
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catch {report_dcalc -from [get_pins u1/A] -to [get_pins u1/Y] -max} msg
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puts "arnoldi dcalc u1: done"
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catch {report_dcalc -from [get_pins u2/A] -to [get_pins u2/Y] -max} msg
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puts "arnoldi dcalc u2: done"
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puts "--- lumped_cap with estimated ---"
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set_delay_calculator lumped_cap
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report_checks
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puts "PASS: lumped_cap"
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catch {report_dcalc -from [get_pins u1/A] -to [get_pins u1/Y] -max} msg
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puts "lumped_cap dcalc u1: done"
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puts "--- dmp_ceff_two_pole with estimated ---"
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set_delay_calculator dmp_ceff_two_pole
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report_checks
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puts "PASS: dmp_ceff_two_pole"
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catch {report_dcalc -from [get_pins r1/CLK] -to [get_pins r1/Q] -max} msg
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puts "dmp_ceff_two_pole dcalc r1: done"
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#---------------------------------------------------------------
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# Override pi model (re-set on same pin)
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#---------------------------------------------------------------
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puts "--- override pi model ---"
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set_delay_calculator dmp_ceff_elmore
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catch {sta::set_pi_model u1/Y 0.02 25.0 0.01} msg
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puts "re-set pi_model u1/Y: $msg"
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report_checks
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puts "PASS: report after pi_model override"
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#---------------------------------------------------------------
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# Now load SPEF on top to override manual (tests delete/override paths)
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#---------------------------------------------------------------
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puts "--- SPEF override ---"
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read_spef ../../test/reg1_asap7.spef
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puts "PASS: read_spef after manual parasitics"
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report_checks
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puts "PASS: report_checks after SPEF override"
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report_parasitic_annotation
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puts "PASS: parasitic annotation after SPEF"
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report_parasitic_annotation -report_unannotated
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puts "PASS: parasitic annotation unannotated after SPEF"
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#---------------------------------------------------------------
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# Report nets with parasitics
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#---------------------------------------------------------------
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puts "--- report_net after SPEF ---"
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foreach net_name {r1q r2q u1z u2z out in1 in2} {
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catch {report_net -digits 4 $net_name} msg
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puts "report_net $net_name: done"
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}
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#---------------------------------------------------------------
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# Annotated delay reporting
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#---------------------------------------------------------------
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puts "--- annotated delay ---"
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catch {report_annotated_delay -cell -net} msg
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puts "annotated -cell -net: done"
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catch {report_annotated_delay -from_in_ports -to_out_ports} msg
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puts "annotated from/to: done"
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catch {report_annotated_delay -report_annotated} msg
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puts "annotated -report_annotated: done"
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catch {report_annotated_delay -report_unannotated} msg
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puts "annotated -report_unannotated: done"
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puts "ALL PASSED"
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