297 lines
10 KiB
Tcl
297 lines
10 KiB
Tcl
# Test multi-library equivalent cell analysis for code coverage
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# Targets: EquivCells.cc (hashCell, hashCellPorts, equivCellPorts, equivCellTimingArcSets,
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# CellDriveResistanceGreater, cross-library matching),
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# Liberty.cc (cell comparison, port iteration),
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# LibertyReader.cc (multiple library reading)
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source ../../test/helpers.tcl
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############################################################
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# Read multiple Nangate45 corners for cross-library equiv
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############################################################
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read_liberty ../../test/nangate45/Nangate45_typ.lib
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puts "PASS: read Nangate45 typ"
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read_liberty ../../test/nangate45/Nangate45_fast.lib
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puts "PASS: read Nangate45 fast"
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read_liberty ../../test/nangate45/Nangate45_slow.lib
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puts "PASS: read Nangate45 slow"
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############################################################
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# Make equiv cells for typ library
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############################################################
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set typ_lib [lindex [get_libs NangateOpenCellLibrary] 0]
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sta::make_equiv_cells $typ_lib
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puts "PASS: make_equiv_cells typ"
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############################################################
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# Find equiv cells in typ library (various cell families)
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############################################################
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# INV family
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set inv_x1 [get_lib_cell NangateOpenCellLibrary/INV_X1]
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catch {
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set inv_equivs [sta::find_equiv_cells $inv_x1]
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puts "PASS: find_equiv_cells INV_X1 typ ([llength $inv_equivs] equivs)"
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}
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# BUF family
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set buf_x1 [get_lib_cell NangateOpenCellLibrary/BUF_X1]
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catch {
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set buf_equivs [sta::find_equiv_cells $buf_x1]
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puts "PASS: find_equiv_cells BUF_X1 typ ([llength $buf_equivs] equivs)"
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}
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# NAND2 family
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set nand2_x1 [get_lib_cell NangateOpenCellLibrary/NAND2_X1]
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catch {
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set nand2_equivs [sta::find_equiv_cells $nand2_x1]
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puts "PASS: find_equiv_cells NAND2_X1 typ ([llength $nand2_equivs] equivs)"
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}
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# NAND3 family
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set nand3_x1 [get_lib_cell NangateOpenCellLibrary/NAND3_X1]
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catch {
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set nand3_equivs [sta::find_equiv_cells $nand3_x1]
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puts "PASS: find_equiv_cells NAND3_X1 typ ([llength $nand3_equivs] equivs)"
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}
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# NAND4 family
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set nand4_x1 [get_lib_cell NangateOpenCellLibrary/NAND4_X1]
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catch {
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set nand4_equivs [sta::find_equiv_cells $nand4_x1]
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puts "PASS: find_equiv_cells NAND4_X1 typ ([llength $nand4_equivs] equivs)"
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}
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# NOR2 family
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set nor2_x1 [get_lib_cell NangateOpenCellLibrary/NOR2_X1]
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catch {
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set nor2_equivs [sta::find_equiv_cells $nor2_x1]
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puts "PASS: find_equiv_cells NOR2_X1 typ ([llength $nor2_equivs] equivs)"
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}
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# NOR3 family
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set nor3_x1 [get_lib_cell NangateOpenCellLibrary/NOR3_X1]
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catch {
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set nor3_equivs [sta::find_equiv_cells $nor3_x1]
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puts "PASS: find_equiv_cells NOR3_X1 typ ([llength $nor3_equivs] equivs)"
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}
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# NOR4 family
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set nor4_x1 [get_lib_cell NangateOpenCellLibrary/NOR4_X1]
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catch {
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set nor4_equivs [sta::find_equiv_cells $nor4_x1]
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puts "PASS: find_equiv_cells NOR4_X1 typ ([llength $nor4_equivs] equivs)"
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}
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# AND2 family
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set and2_x1 [get_lib_cell NangateOpenCellLibrary/AND2_X1]
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catch {
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set and2_equivs [sta::find_equiv_cells $and2_x1]
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puts "PASS: find_equiv_cells AND2_X1 typ ([llength $and2_equivs] equivs)"
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}
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# OR2 family
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set or2_x1 [get_lib_cell NangateOpenCellLibrary/OR2_X1]
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catch {
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set or2_equivs [sta::find_equiv_cells $or2_x1]
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puts "PASS: find_equiv_cells OR2_X1 typ ([llength $or2_equivs] equivs)"
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}
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# AOI21 family
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set aoi21_x1 [get_lib_cell NangateOpenCellLibrary/AOI21_X1]
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catch {
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set aoi21_equivs [sta::find_equiv_cells $aoi21_x1]
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puts "PASS: find_equiv_cells AOI21_X1 typ ([llength $aoi21_equivs] equivs)"
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}
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# OAI21 family
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set oai21_x1 [get_lib_cell NangateOpenCellLibrary/OAI21_X1]
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catch {
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set oai21_equivs [sta::find_equiv_cells $oai21_x1]
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puts "PASS: find_equiv_cells OAI21_X1 typ ([llength $oai21_equivs] equivs)"
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}
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# DFF family
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set dff_x1 [get_lib_cell NangateOpenCellLibrary/DFF_X1]
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catch {
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set dff_equivs [sta::find_equiv_cells $dff_x1]
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puts "PASS: find_equiv_cells DFF_X1 typ ([llength $dff_equivs] equivs)"
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}
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# SDFF family
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set sdff_x1 [get_lib_cell NangateOpenCellLibrary/SDFF_X1]
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catch {
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set sdff_equivs [sta::find_equiv_cells $sdff_x1]
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puts "PASS: find_equiv_cells SDFF_X1 typ ([llength $sdff_equivs] equivs)"
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}
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# CLKBUF family
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set clkbuf_x1 [get_lib_cell NangateOpenCellLibrary/CLKBUF_X1]
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catch {
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set clkbuf_equivs [sta::find_equiv_cells $clkbuf_x1]
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puts "PASS: find_equiv_cells CLKBUF_X1 typ ([llength $clkbuf_equivs] equivs)"
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}
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# XOR2 family
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set xor2_x1 [get_lib_cell NangateOpenCellLibrary/XOR2_X1]
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catch {
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set xor2_equivs [sta::find_equiv_cells $xor2_x1]
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puts "PASS: find_equiv_cells XOR2_X1 typ ([llength $xor2_equivs] equivs)"
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}
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############################################################
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# Cross-library equiv_cells comparisons
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############################################################
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set fast_inv_x1 [get_lib_cell NangateOpenCellLibrary_fast/INV_X1]
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set slow_inv_x1 [get_lib_cell NangateOpenCellLibrary_slow/INV_X1]
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set result [sta::equiv_cells $inv_x1 $fast_inv_x1]
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puts "PASS: equiv_cells typ/fast INV_X1 = $result"
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set result [sta::equiv_cells $inv_x1 $slow_inv_x1]
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puts "PASS: equiv_cells typ/slow INV_X1 = $result"
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set result [sta::equiv_cells $fast_inv_x1 $slow_inv_x1]
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puts "PASS: equiv_cells fast/slow INV_X1 = $result"
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# Cross-library BUF
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set fast_buf_x1 [get_lib_cell NangateOpenCellLibrary_fast/BUF_X1]
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set result [sta::equiv_cells $buf_x1 $fast_buf_x1]
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puts "PASS: equiv_cells typ/fast BUF_X1 = $result"
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# Cross-library NAND2
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set fast_nand2_x1 [get_lib_cell NangateOpenCellLibrary_fast/NAND2_X1]
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set result [sta::equiv_cells $nand2_x1 $fast_nand2_x1]
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puts "PASS: equiv_cells typ/fast NAND2_X1 = $result"
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# Cross-library DFF
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set fast_dff_x1 [get_lib_cell NangateOpenCellLibrary_fast/DFF_X1]
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set result [sta::equiv_cells $dff_x1 $fast_dff_x1]
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puts "PASS: equiv_cells typ/fast DFF_X1 = $result"
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############################################################
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# equiv_cell_ports cross-library
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############################################################
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set result [sta::equiv_cell_ports $inv_x1 $fast_inv_x1]
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puts "PASS: equiv_cell_ports typ/fast INV_X1 = $result"
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set result [sta::equiv_cell_ports $buf_x1 $fast_buf_x1]
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puts "PASS: equiv_cell_ports typ/fast BUF_X1 = $result"
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# Different function should NOT match
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set result [sta::equiv_cell_ports $inv_x1 $buf_x1]
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puts "PASS: equiv_cell_ports INV_X1 vs BUF_X1 = $result"
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set result [sta::equiv_cell_ports $nand2_x1 $nand3_x1]
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puts "PASS: equiv_cell_ports NAND2_X1 vs NAND3_X1 = $result"
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############################################################
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# equiv_cell_timing_arcs cross-library
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############################################################
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set result [sta::equiv_cell_timing_arcs $inv_x1 $fast_inv_x1]
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puts "PASS: equiv_cell_timing_arcs typ/fast INV_X1 = $result"
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set result [sta::equiv_cell_timing_arcs $buf_x1 $fast_buf_x1]
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puts "PASS: equiv_cell_timing_arcs typ/fast BUF_X1 = $result"
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set result [sta::equiv_cell_timing_arcs $inv_x1 $buf_x1]
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puts "PASS: equiv_cell_timing_arcs INV_X1 vs BUF_X1 = $result"
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############################################################
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# Find library buffers for each library
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############################################################
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set typ_buffers [sta::find_library_buffers $typ_lib]
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puts "PASS: find_library_buffers typ ([llength $typ_buffers] buffers)"
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set fast_lib [lindex [get_libs NangateOpenCellLibrary_fast] 0]
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set fast_buffers [sta::find_library_buffers $fast_lib]
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puts "PASS: find_library_buffers fast ([llength $fast_buffers] buffers)"
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set slow_lib [lindex [get_libs NangateOpenCellLibrary_slow] 0]
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set slow_buffers [sta::find_library_buffers $slow_lib]
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puts "PASS: find_library_buffers slow ([llength $slow_buffers] buffers)"
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############################################################
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# Additional equiv cells in typ library - within family
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############################################################
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# Same family - different sizes
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set inv_x2 [get_lib_cell NangateOpenCellLibrary/INV_X2]
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set inv_x4 [get_lib_cell NangateOpenCellLibrary/INV_X4]
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set inv_x8 [get_lib_cell NangateOpenCellLibrary/INV_X8]
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set inv_x16 [get_lib_cell NangateOpenCellLibrary/INV_X16]
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set inv_x32 [get_lib_cell NangateOpenCellLibrary/INV_X32]
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set result [sta::equiv_cells $inv_x1 $inv_x2]
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puts "PASS: equiv_cells INV_X1/X2 = $result"
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set result [sta::equiv_cells $inv_x1 $inv_x4]
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puts "PASS: equiv_cells INV_X1/X4 = $result"
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set result [sta::equiv_cells $inv_x1 $inv_x8]
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puts "PASS: equiv_cells INV_X1/X8 = $result"
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set result [sta::equiv_cells $inv_x1 $inv_x16]
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puts "PASS: equiv_cells INV_X1/X16 = $result"
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set result [sta::equiv_cells $inv_x1 $inv_x32]
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puts "PASS: equiv_cells INV_X1/X32 = $result"
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# Different family comparisons
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set result [sta::equiv_cells $nand2_x1 $nor2_x1]
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puts "PASS: equiv_cells NAND2/NOR2 = $result"
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set result [sta::equiv_cells $and2_x1 $or2_x1]
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puts "PASS: equiv_cells AND2/OR2 = $result"
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set result [sta::equiv_cells $aoi21_x1 $oai21_x1]
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puts "PASS: equiv_cells AOI21/OAI21 = $result"
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set dffr_x1 [get_lib_cell NangateOpenCellLibrary/DFFR_X1]
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set result [sta::equiv_cells $dff_x1 $dffr_x1]
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puts "PASS: equiv_cells DFF/DFFR = $result"
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set dffs_x1 [get_lib_cell NangateOpenCellLibrary/DFFS_X1]
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set result [sta::equiv_cells $dff_x1 $dffs_x1]
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puts "PASS: equiv_cells DFF/DFFS = $result"
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set dffrs_x1 [get_lib_cell NangateOpenCellLibrary/DFFRS_X1]
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set result [sta::equiv_cells $dffr_x1 $dffrs_x1]
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puts "PASS: equiv_cells DFFR/DFFRS = $result"
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############################################################
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# Read LVT library and make equiv cells
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############################################################
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read_liberty ../../test/nangate45/Nangate45_lvt.lib
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puts "PASS: read Nangate45 LVT"
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set lvt_lib [lindex [get_libs NangateOpenCellLibrary_lvt] 0]
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sta::make_equiv_cells $lvt_lib
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puts "PASS: make_equiv_cells lvt"
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set lvt_inv_x1 [get_lib_cell NangateOpenCellLibrary_lvt/INV_X1_L]
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catch {
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set lvt_inv_equivs [sta::find_equiv_cells $lvt_inv_x1]
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puts "PASS: find_equiv_cells LVT INV_X1_L ([llength $lvt_inv_equivs] equivs)"
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}
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set lvt_buffers [sta::find_library_buffers $lvt_lib]
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puts "PASS: find_library_buffers LVT ([llength $lvt_buffers] buffers)"
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# Cross library with LVT (different cell naming so not equiv)
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set result [sta::equiv_cells $inv_x1 $lvt_inv_x1]
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puts "PASS: equiv_cells typ/lvt INV_X1 vs INV_X1_L = $result"
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set result [sta::equiv_cell_ports $inv_x1 $lvt_inv_x1]
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puts "PASS: equiv_cell_ports typ/lvt INV_X1 vs INV_X1_L = $result"
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puts "ALL PASSED"
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