188 lines
6.9 KiB
Tcl
188 lines
6.9 KiB
Tcl
# Deep equivalent cell testing for EquivCells.cc code coverage.
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# Targets:
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# EquivCells.cc: findEquivCells, mapEquivCells,
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# hashCell, hashCellPorts, hashCellSequentials, hashSequential,
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# hashFuncExpr, hashPort, hashStatetable, hashStatetableRow,
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# equivCells, equivCellPorts, equivCellFuncs, equivCellSequentials,
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# equivCellStatetables, equivCellTimingArcSets, equivCellsArcs,
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# cellHasFuncs, cellDriveResistance, CellDriveResistanceGreater
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# Liberty.cc: Sequential related, Statetable related,
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# LibertyPort::equiv, FuncExpr::equiv
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source ../../test/helpers.tcl
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############################################################
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# Read Nangate library
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############################################################
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read_liberty ../../test/nangate45/Nangate45_typ.lib
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puts "PASS: read Nangate45"
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set lib [lindex [get_libs NangateOpenCellLibrary] 0]
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############################################################
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# Make equiv cells
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############################################################
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sta::make_equiv_cells $lib
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puts "PASS: make_equiv_cells"
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############################################################
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# Test equiv cells for all major gate families
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############################################################
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# Inverters (should find INV_X1/X2/X4/X8/X16/X32 as equivalent)
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set inv_x1 [get_lib_cell NangateOpenCellLibrary/INV_X1]
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set equivs [sta::find_equiv_cells $inv_x1]
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puts "INV_X1 equiv count = [llength $equivs]"
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foreach eq $equivs {
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puts " equiv: [$eq name]"
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}
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puts "PASS: INV equiv cells"
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# Buffers
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set buf_x1 [get_lib_cell NangateOpenCellLibrary/BUF_X1]
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set equivs [sta::find_equiv_cells $buf_x1]
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puts "BUF_X1 equiv count = [llength $equivs]"
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foreach eq $equivs {
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puts " equiv: [$eq name]"
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}
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puts "PASS: BUF equiv cells"
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# 2-input gates
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foreach gate {NAND2 NOR2 AND2 OR2 XOR2 XNOR2} {
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set cell [get_lib_cell NangateOpenCellLibrary/${gate}_X1]
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set equivs [sta::find_equiv_cells $cell]
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puts "${gate}_X1 equiv count = [llength $equivs]"
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puts "PASS: ${gate} equiv cells"
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}
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# 3-input gates
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foreach gate {NAND3 NOR3 AND3 OR3} {
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catch {
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set cell [get_lib_cell NangateOpenCellLibrary/${gate}_X1]
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set equivs [sta::find_equiv_cells $cell]
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puts "${gate}_X1 equiv count = [llength $equivs]"
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}
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}
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puts "PASS: 3-input gate equiv cells"
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# 4-input gates
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foreach gate {NAND4 NOR4 AND4 OR4} {
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catch {
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set cell [get_lib_cell NangateOpenCellLibrary/${gate}_X1]
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set equivs [sta::find_equiv_cells $cell]
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puts "${gate}_X1 equiv count = [llength $equivs]"
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}
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}
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puts "PASS: 4-input gate equiv cells"
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# AOI/OAI gates
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foreach gate {AOI21 OAI21 AOI22 OAI22 AOI211 OAI211} {
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catch {
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set cell [get_lib_cell NangateOpenCellLibrary/${gate}_X1]
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set equivs [sta::find_equiv_cells $cell]
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puts "${gate}_X1 equiv count = [llength $equivs]"
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}
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}
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puts "PASS: AOI/OAI equiv cells"
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# MUX cells
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catch {
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set mux_cell [get_lib_cell NangateOpenCellLibrary/MUX2_X1]
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set equivs [sta::find_equiv_cells $mux_cell]
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puts "MUX2_X1 equiv count = [llength $equivs]"
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}
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puts "PASS: MUX equiv cells"
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# DFF cells (sequential equivalence)
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set dff_x1 [get_lib_cell NangateOpenCellLibrary/DFF_X1]
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set dff_equivs [sta::find_equiv_cells $dff_x1]
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puts "DFF_X1 equiv count = [llength $dff_equivs]"
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foreach eq $dff_equivs {
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puts " equiv: [$eq name]"
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}
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puts "PASS: DFF equiv cells"
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# DFFR cells (reset flip-flop)
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set dffr_x1 [get_lib_cell NangateOpenCellLibrary/DFFR_X1]
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set dffr_equivs [sta::find_equiv_cells $dffr_x1]
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puts "DFFR_X1 equiv count = [llength $dffr_equivs]"
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puts "PASS: DFFR equiv cells"
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# DFFS cells (set flip-flop)
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set dffs_x1 [get_lib_cell NangateOpenCellLibrary/DFFS_X1]
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set dffs_equivs [sta::find_equiv_cells $dffs_x1]
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puts "DFFS_X1 equiv count = [llength $dffs_equivs]"
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puts "PASS: DFFS equiv cells"
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# SDFF cells (scan DFF)
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set sdff_x1 [get_lib_cell NangateOpenCellLibrary/SDFF_X1]
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set sdff_equivs [sta::find_equiv_cells $sdff_x1]
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puts "SDFF_X1 equiv count = [llength $sdff_equivs]"
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puts "PASS: SDFF equiv cells"
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############################################################
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# Cross-cell type equiv comparisons (should be false)
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############################################################
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set inv_x1 [get_lib_cell NangateOpenCellLibrary/INV_X1]
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set buf_x1 [get_lib_cell NangateOpenCellLibrary/BUF_X1]
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set nand2_x1 [get_lib_cell NangateOpenCellLibrary/NAND2_X1]
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set nor2_x1 [get_lib_cell NangateOpenCellLibrary/NOR2_X1]
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set dff_x1 [get_lib_cell NangateOpenCellLibrary/DFF_X1]
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# Pairwise comparisons that should be false
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puts "equiv INV BUF = [sta::equiv_cells $inv_x1 $buf_x1]"
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puts "equiv INV NAND = [sta::equiv_cells $inv_x1 $nand2_x1]"
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puts "equiv NAND NOR = [sta::equiv_cells $nand2_x1 $nor2_x1]"
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puts "equiv INV DFF = [sta::equiv_cells $inv_x1 $dff_x1]"
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puts "PASS: cross-type comparisons"
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# Port equivalence detailed
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puts "port_equiv INV_X1 INV_X2 = [sta::equiv_cell_ports $inv_x1 [get_lib_cell NangateOpenCellLibrary/INV_X2]]"
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puts "port_equiv INV_X1 BUF_X1 = [sta::equiv_cell_ports $inv_x1 $buf_x1]"
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puts "port_equiv NAND2_X1 NAND2_X2 = [sta::equiv_cell_ports $nand2_x1 [get_lib_cell NangateOpenCellLibrary/NAND2_X2]]"
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puts "PASS: port equivalence"
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# Timing arc equivalence
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puts "arc_equiv INV_X1 INV_X2 = [sta::equiv_cell_timing_arcs $inv_x1 [get_lib_cell NangateOpenCellLibrary/INV_X2]]"
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puts "arc_equiv INV_X1 BUF_X1 = [sta::equiv_cell_timing_arcs $inv_x1 $buf_x1]"
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puts "arc_equiv DFF_X1 DFF_X2 = [sta::equiv_cell_timing_arcs $dff_x1 [get_lib_cell NangateOpenCellLibrary/DFF_X2]]"
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puts "arc_equiv DFF_X1 DFFR_X1 = [sta::equiv_cell_timing_arcs $dff_x1 $dffr_x1]"
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puts "PASS: timing arc equivalence"
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############################################################
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# Multi-library equivalence (exercises mapEquivCells)
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############################################################
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read_liberty ../../test/nangate45/Nangate45_fast.lib
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puts "PASS: read Nangate45_fast"
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set fast_lib [lindex [get_libs NangateOpenCellLibrary_fast] 0]
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sta::make_equiv_cells $fast_lib
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puts "PASS: make_equiv_cells fast lib"
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# Cross-library comparisons
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set fast_inv [get_lib_cell NangateOpenCellLibrary_fast/INV_X1]
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set fast_buf [get_lib_cell NangateOpenCellLibrary_fast/BUF_X1]
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puts "equiv typ_INV fast_INV = [sta::equiv_cells $inv_x1 $fast_inv]"
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puts "equiv typ_INV fast_BUF = [sta::equiv_cells $inv_x1 $fast_buf]"
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puts "port_equiv typ_INV fast_INV = [sta::equiv_cell_ports $inv_x1 $fast_inv]"
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puts "arc_equiv typ_INV fast_INV = [sta::equiv_cell_timing_arcs $inv_x1 $fast_inv]"
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puts "PASS: cross-library equivalence"
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# Find equiv cells in the fast library
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set fast_equivs [sta::find_equiv_cells $fast_inv]
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puts "fast INV_X1 equiv count = [llength $fast_equivs]"
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puts "PASS: fast lib equiv cells"
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############################################################
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# Find library buffers
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############################################################
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set lib [lindex [get_libs NangateOpenCellLibrary] 0]
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set buffers [sta::find_library_buffers $lib]
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puts "Library buffers count = [llength $buffers]"
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foreach buf $buffers {
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puts " buffer: [$buf name]"
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}
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puts "PASS: find_library_buffers"
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puts "ALL PASSED"
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