981 lines
31 KiB
Plaintext
981 lines
31 KiB
Plaintext
Warning: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 13178, timing group from output port.
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Warning: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 13211, timing group from output port.
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Warning: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 13244, timing group from output port.
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Warning: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 13277, timing group from output port.
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Warning: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 13310, timing group from output port.
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Warning: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 13343, timing group from output port.
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Warning: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 13376, timing group from output port.
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Warning: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 14772, timing group from output port.
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Warning: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 14805, timing group from output port.
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Warning: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 14838, timing group from output port.
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--- Test 1: manual pi + dmp_ceff_elmore ---
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PASS: pi/elmore set
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Startpoint: r2 (rising edge-triggered flip-flop clocked by clk)
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Endpoint: r3 (rising edge-triggered flip-flop clocked by clk)
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Path Group: clk
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (propagated)
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0.00 0.00 ^ r2/CLK (DFFHQx4_ASAP7_75t_R)
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48.40 48.40 ^ r2/Q (DFFHQx4_ASAP7_75t_R)
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11.77 60.17 ^ u1/Y (BUFx2_ASAP7_75t_R)
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14.88 75.04 ^ u2/Y (AND2x2_ASAP7_75t_R)
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0.00 75.04 ^ r3/D (DFFHQx4_ASAP7_75t_R)
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75.04 data arrival time
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500.00 500.00 clock clk (rise edge)
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0.00 500.00 clock network delay (propagated)
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0.00 500.00 clock reconvergence pessimism
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500.00 ^ r3/CLK (DFFHQx4_ASAP7_75t_R)
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-5.78 494.22 library setup time
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494.22 data required time
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---------------------------------------------------------
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494.22 data required time
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-75.04 data arrival time
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---------------------------------------------------------
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419.17 slack (MET)
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PASS: dmp_ceff_elmore with pi
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Startpoint: in1 (input port clocked by clk)
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Endpoint: r1 (rising edge-triggered flip-flop clocked by clk)
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Path Group: clk
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Path Type: min
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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1.00 1.00 v input external delay
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0.00 1.00 v in1 (in)
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0.00 1.00 v r1/D (DFFHQx4_ASAP7_75t_R)
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1.00 data arrival time
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (propagated)
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0.00 0.00 clock reconvergence pessimism
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0.00 ^ r1/CLK (DFFHQx4_ASAP7_75t_R)
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8.56 8.56 library hold time
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8.56 data required time
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---------------------------------------------------------
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8.56 data required time
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-1.00 data arrival time
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---------------------------------------------------------
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-7.56 slack (VIOLATED)
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PASS: min with pi
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--- Test 2: dmp_ceff_two_pole ---
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Startpoint: r2 (rising edge-triggered flip-flop clocked by clk)
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Endpoint: r3 (rising edge-triggered flip-flop clocked by clk)
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Path Group: clk
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (propagated)
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0.00 0.00 ^ r2/CLK (DFFHQx4_ASAP7_75t_R)
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48.40 48.40 ^ r2/Q (DFFHQx4_ASAP7_75t_R)
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11.77 60.17 ^ u1/Y (BUFx2_ASAP7_75t_R)
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14.88 75.04 ^ u2/Y (AND2x2_ASAP7_75t_R)
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0.00 75.04 ^ r3/D (DFFHQx4_ASAP7_75t_R)
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75.04 data arrival time
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500.00 500.00 clock clk (rise edge)
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0.00 500.00 clock network delay (propagated)
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0.00 500.00 clock reconvergence pessimism
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500.00 ^ r3/CLK (DFFHQx4_ASAP7_75t_R)
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-5.78 494.22 library setup time
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494.22 data required time
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---------------------------------------------------------
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494.22 data required time
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-75.04 data arrival time
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---------------------------------------------------------
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419.17 slack (MET)
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PASS: dmp_ceff_two_pole with pi
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No paths found.
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PASS: in1->out two_pole
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No paths found.
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PASS: in2->out two_pole
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--- Test 3: extreme slew ---
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Startpoint: r2 (rising edge-triggered flip-flop clocked by clk)
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Endpoint: r3 (rising edge-triggered flip-flop clocked by clk)
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Path Group: clk
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (propagated)
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0.00 0.00 ^ r2/CLK (DFFHQx4_ASAP7_75t_R)
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45.32 45.32 ^ r2/Q (DFFHQx4_ASAP7_75t_R)
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11.76 57.08 ^ u1/Y (BUFx2_ASAP7_75t_R)
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14.88 71.96 ^ u2/Y (AND2x2_ASAP7_75t_R)
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0.00 71.96 ^ r3/D (DFFHQx4_ASAP7_75t_R)
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71.96 data arrival time
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500.00 500.00 clock clk (rise edge)
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0.00 500.00 clock network delay (propagated)
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0.00 500.00 clock reconvergence pessimism
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500.00 ^ r3/CLK (DFFHQx4_ASAP7_75t_R)
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-7.11 492.89 library setup time
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492.89 data required time
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---------------------------------------------------------
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492.89 data required time
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-71.96 data arrival time
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---------------------------------------------------------
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420.94 slack (MET)
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PASS: very small slew 0.01
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Startpoint: r2 (rising edge-triggered flip-flop clocked by clk)
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Endpoint: r3 (rising edge-triggered flip-flop clocked by clk)
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Path Group: clk
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (propagated)
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0.00 0.00 ^ r2/CLK (DFFHQx4_ASAP7_75t_R)
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45.34 45.34 ^ r2/Q (DFFHQx4_ASAP7_75t_R)
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11.76 57.11 ^ u1/Y (BUFx2_ASAP7_75t_R)
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14.88 71.98 ^ u2/Y (AND2x2_ASAP7_75t_R)
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0.00 71.98 ^ r3/D (DFFHQx4_ASAP7_75t_R)
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71.98 data arrival time
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500.00 500.00 clock clk (rise edge)
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0.00 500.00 clock network delay (propagated)
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0.00 500.00 clock reconvergence pessimism
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500.00 ^ r3/CLK (DFFHQx4_ASAP7_75t_R)
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-7.09 492.91 library setup time
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492.91 data required time
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---------------------------------------------------------
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492.91 data required time
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-71.98 data arrival time
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---------------------------------------------------------
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420.92 slack (MET)
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PASS: small slew 0.1
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Startpoint: r2 (rising edge-triggered flip-flop clocked by clk)
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Endpoint: r3 (rising edge-triggered flip-flop clocked by clk)
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Path Group: clk
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (propagated)
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0.00 0.00 ^ r2/CLK (DFFHQx4_ASAP7_75t_R)
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56.39 56.39 ^ r2/Q (DFFHQx4_ASAP7_75t_R)
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11.77 68.16 ^ u1/Y (BUFx2_ASAP7_75t_R)
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14.88 83.03 ^ u2/Y (AND2x2_ASAP7_75t_R)
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0.00 83.03 ^ r3/D (DFFHQx4_ASAP7_75t_R)
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83.03 data arrival time
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500.00 500.00 clock clk (rise edge)
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0.00 500.00 clock network delay (propagated)
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0.00 500.00 clock reconvergence pessimism
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500.00 ^ r3/CLK (DFFHQx4_ASAP7_75t_R)
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-3.73 496.27 library setup time
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496.27 data required time
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---------------------------------------------------------
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496.27 data required time
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-83.03 data arrival time
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---------------------------------------------------------
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413.24 slack (MET)
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PASS: medium slew 50
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Startpoint: r2 (rising edge-triggered flip-flop clocked by clk)
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Endpoint: r3 (rising edge-triggered flip-flop clocked by clk)
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Path Group: clk
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (propagated)
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0.00 0.00 ^ r2/CLK (DFFHQx4_ASAP7_75t_R)
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84.45 84.45 ^ r2/Q (DFFHQx4_ASAP7_75t_R)
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11.77 96.22 ^ u1/Y (BUFx2_ASAP7_75t_R)
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14.88 111.09 ^ u2/Y (AND2x2_ASAP7_75t_R)
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0.00 111.09 ^ r3/D (DFFHQx4_ASAP7_75t_R)
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111.09 data arrival time
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500.00 500.00 clock clk (rise edge)
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0.00 500.00 clock network delay (propagated)
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0.00 500.00 clock reconvergence pessimism
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500.00 ^ r3/CLK (DFFHQx4_ASAP7_75t_R)
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2.57 502.57 library setup time
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502.57 data required time
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---------------------------------------------------------
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502.57 data required time
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-111.09 data arrival time
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---------------------------------------------------------
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391.48 slack (MET)
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PASS: large slew 500
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Startpoint: r2 (rising edge-triggered flip-flop clocked by clk)
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Endpoint: r3 (rising edge-triggered flip-flop clocked by clk)
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Path Group: clk
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (propagated)
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0.00 0.00 ^ r2/CLK (DFFHQx4_ASAP7_75t_R)
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161.62 161.62 ^ r2/Q (DFFHQx4_ASAP7_75t_R)
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11.78 173.40 ^ u1/Y (BUFx2_ASAP7_75t_R)
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14.88 188.28 ^ u2/Y (AND2x2_ASAP7_75t_R)
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0.00 188.28 ^ r3/D (DFFHQx4_ASAP7_75t_R)
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188.28 data arrival time
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500.00 500.00 clock clk (rise edge)
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0.00 500.00 clock network delay (propagated)
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0.00 500.00 clock reconvergence pessimism
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500.00 ^ r3/CLK (DFFHQx4_ASAP7_75t_R)
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18.08 518.08 library setup time
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518.08 data required time
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---------------------------------------------------------
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518.08 data required time
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-188.28 data arrival time
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---------------------------------------------------------
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329.80 slack (MET)
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PASS: very large slew 2000
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--- Test 4: tiny pi model ---
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Startpoint: r2 (rising edge-triggered flip-flop clocked by clk)
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Endpoint: r3 (rising edge-triggered flip-flop clocked by clk)
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Path Group: clk
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (propagated)
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0.00 0.00 ^ r2/CLK (DFFHQx4_ASAP7_75t_R)
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48.40 48.40 ^ r2/Q (DFFHQx4_ASAP7_75t_R)
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11.77 60.17 ^ u1/Y (BUFx2_ASAP7_75t_R)
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14.88 75.04 ^ u2/Y (AND2x2_ASAP7_75t_R)
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0.00 75.04 ^ r3/D (DFFHQx4_ASAP7_75t_R)
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75.04 data arrival time
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500.00 500.00 clock clk (rise edge)
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0.00 500.00 clock network delay (propagated)
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0.00 500.00 clock reconvergence pessimism
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500.00 ^ r3/CLK (DFFHQx4_ASAP7_75t_R)
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-5.78 494.22 library setup time
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494.22 data required time
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---------------------------------------------------------
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494.22 data required time
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-75.04 data arrival time
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---------------------------------------------------------
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419.17 slack (MET)
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PASS: tiny pi model
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--- Test 5: large pi model ---
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Startpoint: r2 (rising edge-triggered flip-flop clocked by clk)
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Endpoint: r3 (rising edge-triggered flip-flop clocked by clk)
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Path Group: clk
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (propagated)
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0.00 0.00 ^ r2/CLK (DFFHQx4_ASAP7_75t_R)
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48.40 48.40 ^ r2/Q (DFFHQx4_ASAP7_75t_R)
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11.77 60.17 ^ u1/Y (BUFx2_ASAP7_75t_R)
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14.88 75.04 ^ u2/Y (AND2x2_ASAP7_75t_R)
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0.00 75.04 ^ r3/D (DFFHQx4_ASAP7_75t_R)
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75.04 data arrival time
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500.00 500.00 clock clk (rise edge)
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0.00 500.00 clock network delay (propagated)
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0.00 500.00 clock reconvergence pessimism
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500.00 ^ r3/CLK (DFFHQx4_ASAP7_75t_R)
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-5.78 494.22 library setup time
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494.22 data required time
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---------------------------------------------------------
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494.22 data required time
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-75.04 data arrival time
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---------------------------------------------------------
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419.17 slack (MET)
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PASS: large pi model
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--- Test 6: report_dcalc ---
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Library: asap7sc7p5t_INVBUF_RVT_FF_nldm_211120
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Cell: BUFx2_ASAP7_75t_R
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Arc sense: positive_unate
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Arc type: combinational
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A ^ -> Y ^
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P = 1.000000 V = 0.770000 T = 0.000000
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------- input_net_transition = 6.099100
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| total_output_net_capacitance = 0.565282
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| 1.440000 2.880000
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v --------------------
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5.000000 | 12.833000 15.145800
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10.000000 | 14.375000 16.681900
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Table value = 11.767857
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PVT scale factor = 1.000000
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Delay = 11.767857
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------- input_net_transition = 6.099100
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| total_output_net_capacitance = 0.565282
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| 1.440000 2.880000
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v --------------------
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5.000000 | 7.612690 11.681800
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10.000000 | 7.631100 11.699600
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Table value = 5.145066
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PVT scale factor = 1.000000
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Slew = 5.145066
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Driver waveform slew = 5.145066
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.............................................
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A v -> Y v
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P = 1.000000 V = 0.770000 T = 0.000000
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------- input_net_transition = 5.283920
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| total_output_net_capacitance = 0.565708
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| 1.440000 2.880000
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v --------------------
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5.000000 | 13.395100 15.605499
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10.000000 | 15.032999 17.245100
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Table value = 12.146009
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PVT scale factor = 1.000000
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Delay = 12.146009
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------- input_net_transition = 5.283920
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| total_output_net_capacitance = 0.565708
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| 1.440000 2.880000
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v --------------------
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5.000000 | 6.998250 10.429300
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10.000000 | 7.020140 10.451000
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Table value = 4.916347
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PVT scale factor = 1.000000
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Slew = 4.916347
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Driver waveform slew = 4.916347
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.............................................
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dmp_elmore u1: done
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Library: asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120
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Cell: AND2x2_ASAP7_75t_R
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Arc sense: positive_unate
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Arc type: combinational
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A ^ -> Y ^
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P = 1.0000 V = 0.7000 T = 25.0000
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------- input_net_transition = 6.0255
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| total_output_net_capacitance = 0.6212
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| 1.4400 2.8800
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v --------------------
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5.0000 | 16.6604 19.5485
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10.0000 | 17.8038 20.6883
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Table value = 15.2532
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PVT scale factor = 1.0000
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Delay = 15.2532
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------- input_net_transition = 6.0255
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| total_output_net_capacitance = 0.6212
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| 1.4400 2.8800
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v --------------------
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5.0000 | 9.6841 14.4815
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10.0000 | 9.6803 14.4760
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Table value = 6.9558
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PVT scale factor = 1.0000
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Slew = 6.9558
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Driver waveform slew = 6.9558
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.............................................
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A v -> Y v
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P = 1.0000 V = 0.7000 T = 25.0000
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------- input_net_transition = 5.2046
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| total_output_net_capacitance = 0.6192
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| 1.4400 2.8800
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v --------------------
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5.0000 | 16.7215 19.2327
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10.0000 | 18.4070 20.9322
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Table value = 15.3587
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PVT scale factor = 1.0000
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Delay = 15.3587
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------- input_net_transition = 5.2046
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| total_output_net_capacitance = 0.6192
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| 1.4400 2.8800
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v --------------------
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5.0000 | 8.1900 11.9873
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10.0000 | 8.1957 11.9745
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Table value = 6.0261
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PVT scale factor = 1.0000
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Slew = 6.0261
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Driver waveform slew = 6.0261
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.............................................
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dmp_elmore u2 A: done
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Library: asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120
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Cell: AND2x2_ASAP7_75t_R
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Arc sense: positive_unate
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Arc type: combinational
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B ^ -> Y ^
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P = 1.00 V = 0.70 T = 25.00
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------- input_net_transition = 5.15
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| total_output_net_capacitance = 0.62
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| 1.44 2.88
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v --------------------
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5.00 | 16.47 19.36
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10.00 | 18.11 20.96
|
|
Table value = 14.88
|
|
PVT scale factor = 1.00
|
|
Delay = 14.88
|
|
|
|
------- input_net_transition = 5.15
|
|
| total_output_net_capacitance = 0.62
|
|
| 1.44 2.88
|
|
v --------------------
|
|
5.00 | 9.69 14.48
|
|
10.00 | 9.69 14.49
|
|
Table value = 6.96
|
|
PVT scale factor = 1.00
|
|
Slew = 6.96
|
|
Driver waveform slew = 6.96
|
|
|
|
.............................................
|
|
|
|
B v -> Y v
|
|
P = 1.00 V = 0.70 T = 25.00
|
|
------- input_net_transition = 4.92
|
|
| total_output_net_capacitance = 0.62
|
|
| 1.44 2.88
|
|
v --------------------
|
|
5.00 | 15.82 18.32
|
|
10.00 | 17.62 20.13
|
|
Table value = 14.36
|
|
PVT scale factor = 1.00
|
|
Delay = 14.36
|
|
|
|
------- input_net_transition = 4.92
|
|
| total_output_net_capacitance = 0.62
|
|
| 1.44 2.88
|
|
v --------------------
|
|
5.00 | 8.02 11.83
|
|
10.00 | 8.02 11.83
|
|
Table value = 5.84
|
|
PVT scale factor = 1.00
|
|
Slew = 5.84
|
|
Driver waveform slew = 5.84
|
|
|
|
.............................................
|
|
|
|
dmp_elmore u2 B: done
|
|
Library: asap7sc7p5t_SEQ_RVT_FF_nldm_220123
|
|
Cell: DFFHQx4_ASAP7_75t_R
|
|
Arc sense: non_unate
|
|
Arc type: Reg Clk to Q
|
|
CLK ^ -> Q ^
|
|
P = 1.00 V = 0.77 T = 0.00
|
|
------- input_net_transition = 10.00
|
|
| total_output_net_capacitance = 0.52
|
|
| 1.44 2.88
|
|
v --------------------
|
|
10.00 | 49.30 50.80
|
|
20.00 | 52.04 53.53
|
|
Table value = 48.34
|
|
PVT scale factor = 1.00
|
|
Delay = 48.34
|
|
|
|
------- input_net_transition = 10.00
|
|
| total_output_net_capacitance = 0.52
|
|
| 1.44 2.88
|
|
v --------------------
|
|
10.00 | 7.26 9.21
|
|
20.00 | 7.26 9.21
|
|
Table value = 6.03
|
|
PVT scale factor = 1.00
|
|
Slew = 6.03
|
|
Driver waveform slew = 6.03
|
|
|
|
.............................................
|
|
|
|
CLK ^ -> Q v
|
|
P = 1.00 V = 0.77 T = 0.00
|
|
------- input_net_transition = 10.00
|
|
| total_output_net_capacitance = 0.51
|
|
| 1.44 2.88
|
|
v --------------------
|
|
10.00 | 47.74 49.14
|
|
20.00 | 50.34 51.75
|
|
Table value = 46.84
|
|
PVT scale factor = 1.00
|
|
Delay = 46.84
|
|
|
|
------- input_net_transition = 10.00
|
|
| total_output_net_capacitance = 0.51
|
|
| 1.44 2.88
|
|
v --------------------
|
|
10.00 | 6.31 8.01
|
|
20.00 | 6.30 8.01
|
|
Table value = 5.20
|
|
PVT scale factor = 1.00
|
|
Slew = 5.20
|
|
Driver waveform slew = 5.20
|
|
|
|
.............................................
|
|
|
|
dmp_elmore r1: done
|
|
Library: asap7sc7p5t_SEQ_RVT_FF_nldm_220123
|
|
Cell: DFFHQx4_ASAP7_75t_R
|
|
Arc sense: non_unate
|
|
Arc type: Reg Clk to Q
|
|
CLK ^ -> Q ^
|
|
Pi model C2=0.00 Rpi=2.00 C1=0.00, Ceff=0.00
|
|
P = 1.00 V = 0.77 T = 0.00
|
|
------- input_net_transition = 10.00
|
|
| total_output_net_capacitance = 0.00
|
|
| 1.44 2.88
|
|
v --------------------
|
|
10.00 | 49.30 50.80
|
|
20.00 | 52.04 53.53
|
|
Table value = 47.80
|
|
PVT scale factor = 1.00
|
|
Delay = 47.80
|
|
|
|
------- input_net_transition = 10.00
|
|
| total_output_net_capacitance = 0.00
|
|
| 1.44 2.88
|
|
v --------------------
|
|
10.00 | 7.26 9.21
|
|
20.00 | 7.26 9.21
|
|
Table value = 5.32
|
|
PVT scale factor = 1.00
|
|
Slew = 5.32
|
|
Driver waveform slew = 5.32
|
|
|
|
.............................................
|
|
|
|
CLK ^ -> Q v
|
|
Pi model C2=0.00 Rpi=2.00 C1=0.00, Ceff=0.00
|
|
P = 1.00 V = 0.77 T = 0.00
|
|
------- input_net_transition = 10.00
|
|
| total_output_net_capacitance = 0.00
|
|
| 1.44 2.88
|
|
v --------------------
|
|
10.00 | 47.74 49.14
|
|
20.00 | 50.34 51.75
|
|
Table value = 46.35
|
|
PVT scale factor = 1.00
|
|
Delay = 46.35
|
|
|
|
------- input_net_transition = 10.00
|
|
| total_output_net_capacitance = 0.00
|
|
| 1.44 2.88
|
|
v --------------------
|
|
10.00 | 6.31 8.01
|
|
20.00 | 6.30 8.01
|
|
Table value = 4.60
|
|
PVT scale factor = 1.00
|
|
Slew = 4.60
|
|
Driver waveform slew = 4.60
|
|
|
|
.............................................
|
|
|
|
dmp_elmore r3 min: done
|
|
Library: asap7sc7p5t_INVBUF_RVT_FF_nldm_211120
|
|
Cell: BUFx2_ASAP7_75t_R
|
|
Arc sense: positive_unate
|
|
Arc type: combinational
|
|
A ^ -> Y ^
|
|
P = 1.000000 V = 0.770000 T = 0.000000
|
|
------- input_net_transition = 6.099100
|
|
| total_output_net_capacitance = 0.565282
|
|
| 1.440000 2.880000
|
|
v --------------------
|
|
5.000000 | 12.833000 15.145800
|
|
10.000000 | 14.375000 16.681900
|
|
Table value = 11.767857
|
|
PVT scale factor = 1.000000
|
|
Delay = 11.767857
|
|
|
|
------- input_net_transition = 6.099100
|
|
| total_output_net_capacitance = 0.565282
|
|
| 1.440000 2.880000
|
|
v --------------------
|
|
5.000000 | 7.612690 11.681800
|
|
10.000000 | 7.631100 11.699600
|
|
Table value = 5.145066
|
|
PVT scale factor = 1.000000
|
|
Slew = 5.145066
|
|
Driver waveform slew = 5.145066
|
|
|
|
.............................................
|
|
|
|
A v -> Y v
|
|
P = 1.000000 V = 0.770000 T = 0.000000
|
|
------- input_net_transition = 5.283920
|
|
| total_output_net_capacitance = 0.565708
|
|
| 1.440000 2.880000
|
|
v --------------------
|
|
5.000000 | 13.395100 15.605499
|
|
10.000000 | 15.032999 17.245100
|
|
Table value = 12.146009
|
|
PVT scale factor = 1.000000
|
|
Delay = 12.146009
|
|
|
|
------- input_net_transition = 5.283920
|
|
| total_output_net_capacitance = 0.565708
|
|
| 1.440000 2.880000
|
|
v --------------------
|
|
5.000000 | 6.998250 10.429300
|
|
10.000000 | 7.020140 10.451000
|
|
Table value = 4.916347
|
|
PVT scale factor = 1.000000
|
|
Slew = 4.916347
|
|
Driver waveform slew = 4.916347
|
|
|
|
.............................................
|
|
|
|
dmp_two_pole u1: done
|
|
Library: asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120
|
|
Cell: AND2x2_ASAP7_75t_R
|
|
Arc sense: positive_unate
|
|
Arc type: combinational
|
|
A ^ -> Y ^
|
|
P = 1.00 V = 0.70 T = 25.00
|
|
------- input_net_transition = 6.03
|
|
| total_output_net_capacitance = 0.62
|
|
| 1.44 2.88
|
|
v --------------------
|
|
5.00 | 16.66 19.55
|
|
10.00 | 17.80 20.69
|
|
Table value = 15.25
|
|
PVT scale factor = 1.00
|
|
Delay = 15.25
|
|
|
|
------- input_net_transition = 6.03
|
|
| total_output_net_capacitance = 0.62
|
|
| 1.44 2.88
|
|
v --------------------
|
|
5.00 | 9.68 14.48
|
|
10.00 | 9.68 14.48
|
|
Table value = 6.96
|
|
PVT scale factor = 1.00
|
|
Slew = 6.96
|
|
Driver waveform slew = 6.96
|
|
|
|
.............................................
|
|
|
|
A v -> Y v
|
|
P = 1.00 V = 0.70 T = 25.00
|
|
------- input_net_transition = 5.20
|
|
| total_output_net_capacitance = 0.62
|
|
| 1.44 2.88
|
|
v --------------------
|
|
5.00 | 16.72 19.23
|
|
10.00 | 18.41 20.93
|
|
Table value = 15.36
|
|
PVT scale factor = 1.00
|
|
Delay = 15.36
|
|
|
|
------- input_net_transition = 5.20
|
|
| total_output_net_capacitance = 0.62
|
|
| 1.44 2.88
|
|
v --------------------
|
|
5.00 | 8.19 11.99
|
|
10.00 | 8.20 11.97
|
|
Table value = 6.03
|
|
PVT scale factor = 1.00
|
|
Slew = 6.03
|
|
Driver waveform slew = 6.03
|
|
|
|
.............................................
|
|
|
|
dmp_two_pole u2: done
|
|
Library: asap7sc7p5t_SEQ_RVT_FF_nldm_220123
|
|
Cell: DFFHQx4_ASAP7_75t_R
|
|
Arc sense: non_unate
|
|
Arc type: Reg Clk to Q
|
|
CLK ^ -> Q ^
|
|
P = 1.00 V = 0.77 T = 0.00
|
|
------- input_net_transition = 10.00
|
|
| total_output_net_capacitance = 0.58
|
|
| 1.44 2.88
|
|
v --------------------
|
|
10.00 | 49.30 50.80
|
|
20.00 | 52.04 53.53
|
|
Table value = 48.40
|
|
PVT scale factor = 1.00
|
|
Delay = 48.40
|
|
|
|
------- input_net_transition = 10.00
|
|
| total_output_net_capacitance = 0.58
|
|
| 1.44 2.88
|
|
v --------------------
|
|
10.00 | 7.26 9.21
|
|
20.00 | 7.26 9.21
|
|
Table value = 6.10
|
|
PVT scale factor = 1.00
|
|
Slew = 6.10
|
|
Driver waveform slew = 6.10
|
|
|
|
.............................................
|
|
|
|
CLK ^ -> Q v
|
|
P = 1.00 V = 0.77 T = 0.00
|
|
------- input_net_transition = 10.00
|
|
| total_output_net_capacitance = 0.58
|
|
| 1.44 2.88
|
|
v --------------------
|
|
10.00 | 47.74 49.14
|
|
20.00 | 50.34 51.75
|
|
Table value = 46.90
|
|
PVT scale factor = 1.00
|
|
Delay = 46.90
|
|
|
|
------- input_net_transition = 10.00
|
|
| total_output_net_capacitance = 0.58
|
|
| 1.44 2.88
|
|
v --------------------
|
|
10.00 | 6.31 8.01
|
|
20.00 | 6.30 8.01
|
|
Table value = 5.28
|
|
PVT scale factor = 1.00
|
|
Slew = 5.28
|
|
Driver waveform slew = 5.28
|
|
|
|
.............................................
|
|
|
|
dmp_two_pole r2: done
|
|
PASS: dcalc reports
|
|
--- Test 7: SPEF override manual ---
|
|
PASS: SPEF override
|
|
Startpoint: r2 (rising edge-triggered flip-flop clocked by clk)
|
|
Endpoint: r3 (rising edge-triggered flip-flop clocked by clk)
|
|
Path Group: clk
|
|
Path Type: max
|
|
|
|
Delay Time Description
|
|
---------------------------------------------------------
|
|
0.00 0.00 clock clk (rise edge)
|
|
12.11 12.11 clock network delay (propagated)
|
|
0.00 12.11 ^ r2/CLK (DFFHQx4_ASAP7_75t_R)
|
|
56.18 68.29 ^ r2/Q (DFFHQx4_ASAP7_75t_R)
|
|
11.77 80.05 ^ u1/Y (BUFx2_ASAP7_75t_R)
|
|
14.88 94.93 ^ u2/Y (AND2x2_ASAP7_75t_R)
|
|
0.00 94.93 ^ r3/D (DFFHQx4_ASAP7_75t_R)
|
|
94.93 data arrival time
|
|
|
|
500.00 500.00 clock clk (rise edge)
|
|
11.92 511.92 clock network delay (propagated)
|
|
0.00 511.92 clock reconvergence pessimism
|
|
511.92 ^ r3/CLK (DFFHQx4_ASAP7_75t_R)
|
|
-3.87 508.05 library setup time
|
|
508.05 data required time
|
|
---------------------------------------------------------
|
|
508.05 data required time
|
|
-94.93 data arrival time
|
|
---------------------------------------------------------
|
|
413.12 slack (MET)
|
|
|
|
|
|
PASS: dmp_ceff_elmore with SPEF
|
|
Startpoint: r2 (rising edge-triggered flip-flop clocked by clk)
|
|
Endpoint: r3 (rising edge-triggered flip-flop clocked by clk)
|
|
Path Group: clk
|
|
Path Type: max
|
|
|
|
Delay Time Description
|
|
---------------------------------------------------------
|
|
0.00 0.00 clock clk (rise edge)
|
|
0.00 0.00 clock network delay (propagated)
|
|
0.00 0.00 ^ r2/CLK (DFFHQx4_ASAP7_75t_R)
|
|
48.40 48.40 ^ r2/Q (DFFHQx4_ASAP7_75t_R)
|
|
11.77 60.17 ^ u1/Y (BUFx2_ASAP7_75t_R)
|
|
14.88 75.04 ^ u2/Y (AND2x2_ASAP7_75t_R)
|
|
0.00 75.04 ^ r3/D (DFFHQx4_ASAP7_75t_R)
|
|
75.04 data arrival time
|
|
|
|
500.00 500.00 clock clk (rise edge)
|
|
0.00 500.00 clock network delay (propagated)
|
|
0.00 500.00 clock reconvergence pessimism
|
|
500.00 ^ r3/CLK (DFFHQx4_ASAP7_75t_R)
|
|
-5.78 494.22 library setup time
|
|
494.22 data required time
|
|
---------------------------------------------------------
|
|
494.22 data required time
|
|
-75.04 data arrival time
|
|
---------------------------------------------------------
|
|
419.17 slack (MET)
|
|
|
|
|
|
PASS: dmp_ceff_two_pole with SPEF
|
|
--- Test 8: load variation ---
|
|
Startpoint: r2 (rising edge-triggered flip-flop clocked by clk)
|
|
Endpoint: r3 (rising edge-triggered flip-flop clocked by clk)
|
|
Path Group: clk
|
|
Path Type: max
|
|
|
|
Delay Time Description
|
|
---------------------------------------------------------
|
|
0.00 0.00 clock clk (rise edge)
|
|
12.11 12.11 clock network delay (propagated)
|
|
0.00 12.11 ^ r2/CLK (DFFHQx4_ASAP7_75t_R)
|
|
56.18 68.29 ^ r2/Q (DFFHQx4_ASAP7_75t_R)
|
|
11.77 80.05 ^ u1/Y (BUFx2_ASAP7_75t_R)
|
|
14.88 94.93 ^ u2/Y (AND2x2_ASAP7_75t_R)
|
|
0.00 94.93 ^ r3/D (DFFHQx4_ASAP7_75t_R)
|
|
94.93 data arrival time
|
|
|
|
500.00 500.00 clock clk (rise edge)
|
|
11.92 511.92 clock network delay (propagated)
|
|
0.00 511.92 clock reconvergence pessimism
|
|
511.92 ^ r3/CLK (DFFHQx4_ASAP7_75t_R)
|
|
-3.87 508.05 library setup time
|
|
508.05 data required time
|
|
---------------------------------------------------------
|
|
508.05 data required time
|
|
-94.93 data arrival time
|
|
---------------------------------------------------------
|
|
413.12 slack (MET)
|
|
|
|
|
|
dmp load=0.0001: done
|
|
Startpoint: r2 (rising edge-triggered flip-flop clocked by clk)
|
|
Endpoint: r3 (rising edge-triggered flip-flop clocked by clk)
|
|
Path Group: clk
|
|
Path Type: max
|
|
|
|
Delay Time Description
|
|
---------------------------------------------------------
|
|
0.00 0.00 clock clk (rise edge)
|
|
12.11 12.11 clock network delay (propagated)
|
|
0.00 12.11 ^ r2/CLK (DFFHQx4_ASAP7_75t_R)
|
|
56.18 68.29 ^ r2/Q (DFFHQx4_ASAP7_75t_R)
|
|
11.77 80.05 ^ u1/Y (BUFx2_ASAP7_75t_R)
|
|
14.88 94.93 ^ u2/Y (AND2x2_ASAP7_75t_R)
|
|
0.00 94.93 ^ r3/D (DFFHQx4_ASAP7_75t_R)
|
|
94.93 data arrival time
|
|
|
|
500.00 500.00 clock clk (rise edge)
|
|
11.92 511.92 clock network delay (propagated)
|
|
0.00 511.92 clock reconvergence pessimism
|
|
511.92 ^ r3/CLK (DFFHQx4_ASAP7_75t_R)
|
|
-3.87 508.05 library setup time
|
|
508.05 data required time
|
|
---------------------------------------------------------
|
|
508.05 data required time
|
|
-94.93 data arrival time
|
|
---------------------------------------------------------
|
|
413.12 slack (MET)
|
|
|
|
|
|
dmp load=0.001: done
|
|
Startpoint: r2 (rising edge-triggered flip-flop clocked by clk)
|
|
Endpoint: r3 (rising edge-triggered flip-flop clocked by clk)
|
|
Path Group: clk
|
|
Path Type: max
|
|
|
|
Delay Time Description
|
|
---------------------------------------------------------
|
|
0.00 0.00 clock clk (rise edge)
|
|
12.11 12.11 clock network delay (propagated)
|
|
0.00 12.11 ^ r2/CLK (DFFHQx4_ASAP7_75t_R)
|
|
56.18 68.29 ^ r2/Q (DFFHQx4_ASAP7_75t_R)
|
|
11.77 80.05 ^ u1/Y (BUFx2_ASAP7_75t_R)
|
|
14.88 94.93 ^ u2/Y (AND2x2_ASAP7_75t_R)
|
|
0.00 94.93 ^ r3/D (DFFHQx4_ASAP7_75t_R)
|
|
94.93 data arrival time
|
|
|
|
500.00 500.00 clock clk (rise edge)
|
|
11.92 511.92 clock network delay (propagated)
|
|
0.00 511.92 clock reconvergence pessimism
|
|
511.92 ^ r3/CLK (DFFHQx4_ASAP7_75t_R)
|
|
-3.87 508.05 library setup time
|
|
508.05 data required time
|
|
---------------------------------------------------------
|
|
508.05 data required time
|
|
-94.93 data arrival time
|
|
---------------------------------------------------------
|
|
413.12 slack (MET)
|
|
|
|
|
|
dmp load=0.01: done
|
|
Startpoint: r2 (rising edge-triggered flip-flop clocked by clk)
|
|
Endpoint: r3 (rising edge-triggered flip-flop clocked by clk)
|
|
Path Group: clk
|
|
Path Type: max
|
|
|
|
Delay Time Description
|
|
---------------------------------------------------------
|
|
0.00 0.00 clock clk (rise edge)
|
|
12.11 12.11 clock network delay (propagated)
|
|
0.00 12.11 ^ r2/CLK (DFFHQx4_ASAP7_75t_R)
|
|
56.18 68.29 ^ r2/Q (DFFHQx4_ASAP7_75t_R)
|
|
11.77 80.05 ^ u1/Y (BUFx2_ASAP7_75t_R)
|
|
14.88 94.93 ^ u2/Y (AND2x2_ASAP7_75t_R)
|
|
0.00 94.93 ^ r3/D (DFFHQx4_ASAP7_75t_R)
|
|
94.93 data arrival time
|
|
|
|
500.00 500.00 clock clk (rise edge)
|
|
11.92 511.92 clock network delay (propagated)
|
|
0.00 511.92 clock reconvergence pessimism
|
|
511.92 ^ r3/CLK (DFFHQx4_ASAP7_75t_R)
|
|
-3.87 508.05 library setup time
|
|
508.05 data required time
|
|
---------------------------------------------------------
|
|
508.05 data required time
|
|
-94.93 data arrival time
|
|
---------------------------------------------------------
|
|
413.12 slack (MET)
|
|
|
|
|
|
dmp load=0.05: done
|
|
Startpoint: r2 (rising edge-triggered flip-flop clocked by clk)
|
|
Endpoint: r3 (rising edge-triggered flip-flop clocked by clk)
|
|
Path Group: clk
|
|
Path Type: max
|
|
|
|
Delay Time Description
|
|
---------------------------------------------------------
|
|
0.00 0.00 clock clk (rise edge)
|
|
12.11 12.11 clock network delay (propagated)
|
|
0.00 12.11 ^ r2/CLK (DFFHQx4_ASAP7_75t_R)
|
|
56.18 68.29 ^ r2/Q (DFFHQx4_ASAP7_75t_R)
|
|
11.77 80.05 ^ u1/Y (BUFx2_ASAP7_75t_R)
|
|
14.88 94.93 ^ u2/Y (AND2x2_ASAP7_75t_R)
|
|
0.00 94.93 ^ r3/D (DFFHQx4_ASAP7_75t_R)
|
|
94.93 data arrival time
|
|
|
|
500.00 500.00 clock clk (rise edge)
|
|
11.92 511.92 clock network delay (propagated)
|
|
0.00 511.92 clock reconvergence pessimism
|
|
511.92 ^ r3/CLK (DFFHQx4_ASAP7_75t_R)
|
|
-3.87 508.05 library setup time
|
|
508.05 data required time
|
|
---------------------------------------------------------
|
|
508.05 data required time
|
|
-94.93 data arrival time
|
|
---------------------------------------------------------
|
|
413.12 slack (MET)
|
|
|
|
|
|
dmp load=0.1: done
|
|
PASS: load variation
|
|
--- Test 9: find_delays ---
|
|
PASS: find_delays
|
|
PASS: invalidate + find_delays
|
|
ALL PASSED
|