254 lines
8.3 KiB
Tcl
254 lines
8.3 KiB
Tcl
# Test Arnoldi and Prima delay calculators with SPEF parasitics and
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# different load/slew conditions for improved coverage.
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# Targets: PrimaDelayCalc.cc (prima delay paths, prima reduce RC,
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# prima2, prima3, primaResStamp, primaCapStamp, primaPostReduction)
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# ArnoldiDelayCalc.cc (arnoldi delay, arnoldi reduce RC,
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# arnoldi2, arnoldi3, arnoldiExpand)
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# ArnoldiReduce.cc (arnoldi reduce matrix, arnoldi iteration)
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# GraphDelayCalc.cc (delay calc with parasitics for multiple calculators)
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# DmpCeff.cc (ceff with Pi-model parasitics)
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# FindRoot.cc (root finding with parasitic-loaded timing)
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# Read ASAP7 libraries
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read_liberty ../../test/asap7/asap7sc7p5t_SEQ_RVT_FF_nldm_220123.lib
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read_liberty ../../test/asap7/asap7sc7p5t_INVBUF_RVT_FF_nldm_220122.lib.gz
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read_liberty ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz
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read_liberty ../../test/asap7/asap7sc7p5t_OA_RVT_FF_nldm_211120.lib.gz
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read_liberty ../../test/asap7/asap7sc7p5t_AO_RVT_FF_nldm_211120.lib.gz
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read_verilog ../../test/reg1_asap7.v
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link_design top
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create_clock -name clk -period 500 {clk1 clk2 clk3}
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set_input_delay -clock clk 1 {in1 in2}
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set_output_delay -clock clk 1 [get_ports out]
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set_propagated_clock {clk1 clk2 clk3}
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# Read SPEF parasitics
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puts "--- Reading SPEF ---"
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read_spef ../../test/reg1_asap7.spef
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puts "PASS: read_spef completed"
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#---------------------------------------------------------------
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# Prima delay calculator with various input transition values
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# Exercises: primaDelay, primaReduceRc, prima2, prima3
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#---------------------------------------------------------------
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puts "--- prima with varying slews ---"
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catch {set_delay_calculator prima} msg
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puts "set_delay_calculator prima: $msg"
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foreach slew_val {1 5 10 50 100} {
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set_input_transition $slew_val {in1 in2 clk1 clk2 clk3}
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report_checks
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puts "prima slew=$slew_val: done"
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}
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set_input_transition 10 {in1 in2 clk1 clk2 clk3}
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# Prima with various load values
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puts "--- prima with varying loads ---"
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foreach load_val {0.0001 0.001 0.01 0.1} {
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set_load $load_val [get_ports out]
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report_checks
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puts "prima load=$load_val: done"
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}
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set_load 0 [get_ports out]
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# Prima report_dcalc for all arcs
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puts "--- prima report_dcalc all arcs ---"
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catch {report_dcalc -from [get_pins u1/A] -to [get_pins u1/Y] -max} msg
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puts "prima u1 A->Y max: $msg"
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catch {report_dcalc -from [get_pins u1/A] -to [get_pins u1/Y] -min} msg
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puts "prima u1 A->Y min: $msg"
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catch {report_dcalc -from [get_pins u2/A] -to [get_pins u2/Y] -max} msg
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puts "prima u2 A->Y max: $msg"
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catch {report_dcalc -from [get_pins u2/A] -to [get_pins u2/Y] -min} msg
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puts "prima u2 A->Y min: $msg"
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catch {report_dcalc -from [get_pins u2/B] -to [get_pins u2/Y] -max} msg
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puts "prima u2 B->Y max: $msg"
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catch {report_dcalc -from [get_pins u2/B] -to [get_pins u2/Y] -min} msg
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puts "prima u2 B->Y min: $msg"
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# DFF arcs with prima
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catch {report_dcalc -from [get_pins r1/CLK] -to [get_pins r1/Q] -max} msg
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puts "prima r1 CLK->Q max: $msg"
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catch {report_dcalc -from [get_pins r1/CLK] -to [get_pins r1/Q] -min} msg
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puts "prima r1 CLK->Q min: $msg"
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catch {report_dcalc -from [get_pins r2/CLK] -to [get_pins r2/Q] -max} msg
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puts "prima r2 CLK->Q max: $msg"
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catch {report_dcalc -from [get_pins r3/CLK] -to [get_pins r3/Q] -max} msg
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puts "prima r3 CLK->Q max: $msg"
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catch {report_dcalc -from [get_pins r3/CLK] -to [get_pins r3/Q] -min} msg
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puts "prima r3 CLK->Q min: $msg"
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# DFF check arcs with prima
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catch {report_dcalc -from [get_pins r1/CLK] -to [get_pins r1/D] -max} msg
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puts "prima r1 setup: $msg"
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catch {report_dcalc -from [get_pins r1/CLK] -to [get_pins r1/D] -min} msg
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puts "prima r1 hold: $msg"
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catch {report_dcalc -from [get_pins r3/CLK] -to [get_pins r3/D] -max} msg
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puts "prima r3 setup: $msg"
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catch {report_dcalc -from [get_pins r3/CLK] -to [get_pins r3/D] -min} msg
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puts "prima r3 hold: $msg"
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# report_dcalc with digits
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catch {report_dcalc -from [get_pins u1/A] -to [get_pins u1/Y] -digits 2} msg
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puts "prima u1 2 digits: $msg"
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catch {report_dcalc -from [get_pins u1/A] -to [get_pins u1/Y] -digits 8} msg
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puts "prima u1 8 digits: $msg"
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# Prima with fields
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report_checks -fields {slew cap input_pins nets fanout}
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puts "PASS: prima with all fields"
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report_checks -format full_clock
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puts "PASS: prima full_clock"
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# Prima specific paths
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report_checks -from [get_ports in1] -to [get_ports out]
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puts "PASS: prima in1->out"
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report_checks -from [get_ports in2] -to [get_ports out]
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puts "PASS: prima in2->out"
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report_checks -path_delay min
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puts "PASS: prima min path"
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report_checks -path_delay max
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puts "PASS: prima max path"
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#---------------------------------------------------------------
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# Arnoldi delay calculator with same variations
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# Exercises: arnoldiDelay, arnoldiReduceRc, arnoldiExpand
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#---------------------------------------------------------------
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puts "--- arnoldi with varying slews ---"
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catch {set_delay_calculator arnoldi} msg
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puts "set_delay_calculator arnoldi: $msg"
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foreach slew_val {1 5 10 50 100} {
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set_input_transition $slew_val {in1 in2 clk1 clk2 clk3}
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report_checks
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puts "arnoldi slew=$slew_val: done"
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}
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set_input_transition 10 {in1 in2 clk1 clk2 clk3}
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# Arnoldi with varying loads
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puts "--- arnoldi with varying loads ---"
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foreach load_val {0.0001 0.001 0.01 0.1} {
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set_load $load_val [get_ports out]
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report_checks
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puts "arnoldi load=$load_val: done"
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}
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set_load 0 [get_ports out]
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# Arnoldi report_dcalc for all arcs
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puts "--- arnoldi report_dcalc ---"
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catch {report_dcalc -from [get_pins u1/A] -to [get_pins u1/Y] -max} msg
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puts "arnoldi u1 A->Y max: $msg"
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catch {report_dcalc -from [get_pins u1/A] -to [get_pins u1/Y] -min} msg
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puts "arnoldi u1 A->Y min: $msg"
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catch {report_dcalc -from [get_pins u2/A] -to [get_pins u2/Y] -max} msg
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puts "arnoldi u2 A->Y max: $msg"
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catch {report_dcalc -from [get_pins u2/B] -to [get_pins u2/Y] -max} msg
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puts "arnoldi u2 B->Y max: $msg"
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catch {report_dcalc -from [get_pins r1/CLK] -to [get_pins r1/Q] -max} msg
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puts "arnoldi r1 CLK->Q max: $msg"
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catch {report_dcalc -from [get_pins r1/CLK] -to [get_pins r1/Q] -min} msg
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puts "arnoldi r1 CLK->Q min: $msg"
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catch {report_dcalc -from [get_pins r2/CLK] -to [get_pins r2/Q] -max} msg
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puts "arnoldi r2 CLK->Q max: $msg"
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catch {report_dcalc -from [get_pins r3/CLK] -to [get_pins r3/Q] -max} msg
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puts "arnoldi r3 CLK->Q max: $msg"
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catch {report_dcalc -from [get_pins r1/CLK] -to [get_pins r1/D] -max} msg
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puts "arnoldi r1 setup: $msg"
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catch {report_dcalc -from [get_pins r1/CLK] -to [get_pins r1/D] -min} msg
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puts "arnoldi r1 hold: $msg"
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catch {report_dcalc -from [get_pins r3/CLK] -to [get_pins r3/D] -max} msg
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puts "arnoldi r3 setup: $msg"
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catch {report_dcalc -from [get_pins r3/CLK] -to [get_pins r3/D] -min} msg
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puts "arnoldi r3 hold: $msg"
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# Arnoldi with fields
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report_checks -fields {slew cap input_pins nets fanout}
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puts "PASS: arnoldi with all fields"
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report_checks -format full_clock
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puts "PASS: arnoldi full_clock"
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#---------------------------------------------------------------
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# Switching between parasitic calculators to exercise reinit paths
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#---------------------------------------------------------------
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puts "--- switching parasitic calculators ---"
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set_delay_calculator dmp_ceff_elmore
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report_checks
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puts "PASS: dmp_ceff_elmore with parasitics"
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set_delay_calculator dmp_ceff_two_pole
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report_checks
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puts "PASS: dmp_ceff_two_pole with parasitics"
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catch {set_delay_calculator ccs_ceff} msg
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report_checks
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puts "PASS: ccs_ceff with parasitics"
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set_delay_calculator lumped_cap
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report_checks
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puts "PASS: lumped_cap with parasitics"
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catch {set_delay_calculator prima} msg
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report_checks
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puts "PASS: prima after switching"
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catch {set_delay_calculator arnoldi} msg
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report_checks
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puts "PASS: arnoldi after switching"
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#---------------------------------------------------------------
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# Incremental updates with parasitics
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# Exercises: seedInvalidDelays with parasitic-loaded nets
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#---------------------------------------------------------------
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puts "--- incremental with parasitics ---"
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set_delay_calculator dmp_ceff_elmore
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set_load 0.001 [get_ports out]
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report_checks
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puts "PASS: incremental parasitics after set_load"
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set_input_transition 50 {in1 in2}
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report_checks
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puts "PASS: incremental parasitics after set_input_transition"
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create_clock -name clk -period 200 {clk1 clk2 clk3}
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report_checks
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puts "PASS: incremental parasitics after clock change"
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# Restore
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set_load 0 [get_ports out]
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set_input_transition 10 {in1 in2 clk1 clk2 clk3}
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create_clock -name clk -period 500 {clk1 clk2 clk3}
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puts "ALL PASSED"
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