OpenSTA/network/VerilogNamespace.hh

39 lines
1.2 KiB
C++

// OpenSTA, Static Timing Analyzer
// Copyright (c) 2019, Parallax Software, Inc.
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program. If not, see <https://www.gnu.org/licenses/>.
#ifndef STA_VERILOG_NAMESPACE_H
#define STA_VERILOG_NAMESPACE_H
namespace sta {
const char *
staToVerilog(const char *sta_name,
const char escape);
const char *
verilogToSta(const char *verilog_name);
const char *
instanceVerilogName(const char *sta_name,
const char escape);
const char *
netVerilogName(const char *sta_name,
const char escape);
const char *
portVerilogName(const char *sta_name,
const char escape);
} // namespace
#endif