108 lines
3.5 KiB
Tcl
108 lines
3.5 KiB
Tcl
# Test advanced SPICE writing: write_path_spice with -path_args options
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# and various simulators.
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# NOTE: write_gate_spice tests removed - write_gate_spice_cmd SWIG binding
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# is missing. See bug_report_missing_write_gate_spice_cmd.md.
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source ../../test/helpers.tcl
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read_liberty ../../test/nangate45/Nangate45_typ.lib
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read_verilog spice_test1.v
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link_design spice_test1
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create_clock -name clk -period 10 [get_ports clk]
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set_input_delay -clock clk 1.0 [get_ports in1]
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set_output_delay -clock clk 1.0 [get_ports out1]
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set_input_transition 0.1 [get_ports in1]
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puts "--- report_checks baseline ---"
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report_checks
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# Create mock SPICE files
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set spice_dir [make_result_file spice_adv_out]
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file mkdir $spice_dir
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set model_file [file join $spice_dir mock_model.sp]
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set model_fh [open $model_file w]
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puts $model_fh "* Mock SPICE model file"
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puts $model_fh ".model nmos nmos level=1"
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puts $model_fh ".model pmos pmos level=1"
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close $model_fh
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set subckt_file [file join $spice_dir mock_subckt.sp]
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set subckt_fh [open $subckt_file w]
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puts $subckt_fh "* Mock SPICE subckt file"
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puts $subckt_fh ".subckt BUF_X1 A Z VDD VSS"
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puts $subckt_fh "M1 Z A VDD VDD pmos W=1u L=100n"
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puts $subckt_fh "M2 Z A VSS VSS nmos W=1u L=100n"
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puts $subckt_fh ".ends"
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puts $subckt_fh ""
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puts $subckt_fh ".subckt BUF_X2 A Z VDD VSS"
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puts $subckt_fh "M1 Z A VDD VDD pmos W=1u L=100n"
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puts $subckt_fh "M2 Z A VSS VSS nmos W=1u L=100n"
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puts $subckt_fh ".ends"
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puts $subckt_fh ""
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puts $subckt_fh ".subckt DFF_X1 D CK Q QN VDD VSS"
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puts $subckt_fh "M1 Q D VDD VDD pmos W=1u L=100n"
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puts $subckt_fh "M2 Q D VSS VSS nmos W=1u L=100n"
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puts $subckt_fh ".ends"
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close $subckt_fh
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#---------------------------------------------------------------
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# write_path_spice with -path_args max slack
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#---------------------------------------------------------------
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puts "--- write_path_spice max slack ---"
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set spice_dir2 [make_result_file spice_adv_path]
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file mkdir $spice_dir2
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write_path_spice \
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-path_args {-sort_by_slack -path_delay max} \
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-spice_file [file join $spice_dir2 spice] \
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-lib_subckt_file $subckt_file \
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-model_file $model_file \
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-power VDD \
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-ground VSS
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#---------------------------------------------------------------
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# write_path_spice min path
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#---------------------------------------------------------------
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puts "--- write_path_spice min path ---"
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set spice_dir3 [make_result_file spice_adv_min]
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file mkdir $spice_dir3
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write_path_spice \
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-path_args {-path_delay min} \
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-spice_file [file join $spice_dir3 spice] \
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-lib_subckt_file $subckt_file \
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-model_file $model_file \
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-power VDD \
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-ground VSS
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#---------------------------------------------------------------
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# write_path_spice with hspice
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#---------------------------------------------------------------
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puts "--- write_path_spice hspice ---"
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set spice_dir4 [make_result_file spice_adv_hspice]
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file mkdir $spice_dir4
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write_path_spice \
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-path_args {-sort_by_slack} \
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-spice_file [file join $spice_dir4 spice] \
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-lib_subckt_file $subckt_file \
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-model_file $model_file \
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-power VDD \
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-ground VSS \
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-simulator hspice
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#---------------------------------------------------------------
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# write_path_spice with xyce
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#---------------------------------------------------------------
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puts "--- write_path_spice xyce ---"
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set spice_dir5 [make_result_file spice_adv_xyce]
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file mkdir $spice_dir5
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write_path_spice \
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-path_args {-sort_by_slack} \
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-spice_file [file join $spice_dir5 spice] \
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-lib_subckt_file $subckt_file \
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-model_file $model_file \
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-power VDD \
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-ground VSS \
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-simulator xyce
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