367 lines
14 KiB
Plaintext
367 lines
14 KiB
Plaintext
--- report_path on specific pin/transition ---
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--- report_path on output pin ---
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--- report_path with -all flag ---
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--- report_path with -tags flag ---
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--- report_path with -all -tags combined ---
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--- report_path with various formats ---
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--- report_checks with -fields src_attr ---
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Startpoint: reg1 (rising edge-triggered flip-flop clocked by clk)
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Endpoint: out1 (output port clocked by clk)
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Path Group: clk
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Path Type: max
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Delay Time Description Src Attr
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-------------------------------------------------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 ^ reg1/CK (DFF_X1)
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0.08 0.08 ^ reg1/Q (DFF_X1)
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0.02 0.10 ^ buf2/Z (BUF_X1)
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0.00 0.10 ^ out1 (out)
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0.10 data arrival time
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10.00 10.00 clock clk (rise edge)
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0.00 10.00 clock network delay (ideal)
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0.00 10.00 clock reconvergence pessimism
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-2.00 8.00 output external delay
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8.00 data required time
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-------------------------------------------------------------------------------------------------
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8.00 data required time
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-0.10 data arrival time
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-------------------------------------------------------------------------------------------------
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7.90 slack (MET)
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--- report_checks with -fields all combined ---
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Startpoint: reg1 (rising edge-triggered flip-flop clocked by clk)
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Endpoint: out1 (output port clocked by clk)
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Path Group: clk
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Path Type: max
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Fanout Cap Slew Delay Time Description Src Attr
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---------------------------------------------------------------------------------------------------------------------
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0.00 0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 0.00 ^ reg1/CK (DFF_X1)
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1 0.97 0.01 0.08 0.08 ^ reg1/Q (DFF_X1)
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n3 (net)
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0.01 0.00 0.08 ^ buf2/A (BUF_X1)
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1 0.00 0.00 0.02 0.10 ^ buf2/Z (BUF_X1)
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out1 (net)
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0.00 0.00 0.10 ^ out1 (out)
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0.10 data arrival time
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0.00 10.00 10.00 clock clk (rise edge)
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0.00 10.00 clock network delay (ideal)
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0.00 10.00 clock reconvergence pessimism
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-2.00 8.00 output external delay
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8.00 data required time
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---------------------------------------------------------------------------------------------------------------------
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8.00 data required time
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-0.10 data arrival time
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---------------------------------------------------------------------------------------------------------------------
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7.90 slack (MET)
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--- PathEnd methods ---
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Warning 502: search_report_path_detail.tcl line 1, find_timing_paths -endpoint_count is deprecated. Use -endpoint_path_count instead.
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is_unconstrained: 0
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is_check: 0
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is_latch_check: 0
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is_data_check: 0
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is_output_delay: 1
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is_path_delay: 0
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is_gated_clock: 0
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pin: out1
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end_transition: ^
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slack: 7.899713772019368e-9
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margin: 1.999999943436137e-9
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data_required_time: 7.999999773744548e-9
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data_arrival_time: 1.0028596009181712e-10
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check_role: output setup
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min_max: max
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source_clk_latency: 0.0
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target_clk: clk
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target_clk_edge exists: 1
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target_clk_delay: 0.0
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clk_skew: 0.0
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--- Path methods ---
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arrival: 1.0028596009181712e-10
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required: 0.0
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slack: -1.0028596009181712e-10
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pin: out1
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edge: ^
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tag: 18 default ^max clk ^ clk_src clk crpr_pin null
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path pins: 6
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start_path pin: reg1/Q
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--- group_path with various options ---
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Startpoint: reg1 (rising edge-triggered flip-flop clocked by clk)
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Endpoint: out1 (output port clocked by clk)
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Path Group: out_group
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 ^ reg1/CK (DFF_X1)
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0.08 0.08 ^ reg1/Q (DFF_X1)
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0.02 0.10 ^ buf2/Z (BUF_X1)
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0.00 0.10 ^ out1 (out)
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0.10 data arrival time
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10.00 10.00 clock clk (rise edge)
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0.00 10.00 clock network delay (ideal)
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0.00 10.00 clock reconvergence pessimism
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-2.00 8.00 output external delay
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8.00 data required time
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---------------------------------------------------------
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8.00 data required time
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-0.10 data arrival time
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---------------------------------------------------------
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7.90 slack (MET)
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Startpoint: in1 (input port clocked by clk)
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Endpoint: reg1 (rising edge-triggered flip-flop clocked by clk)
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Path Group: reg_group
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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1.00 1.00 v input external delay
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0.00 1.00 v in1 (in)
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0.02 1.02 v and1/ZN (AND2_X1)
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0.02 1.05 v buf1/Z (BUF_X1)
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0.00 1.05 v reg1/D (DFF_X1)
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1.05 data arrival time
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10.00 10.00 clock clk (rise edge)
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0.00 10.00 clock network delay (ideal)
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0.00 10.00 clock reconvergence pessimism
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10.00 ^ reg1/CK (DFF_X1)
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-0.04 9.96 library setup time
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9.96 data required time
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---------------------------------------------------------
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9.96 data required time
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-1.05 data arrival time
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---------------------------------------------------------
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8.92 slack (MET)
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Startpoint: in2 (input port clocked by clk)
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Endpoint: reg1 (rising edge-triggered flip-flop clocked by clk)
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Path Group: clk
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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1.00 1.00 v input external delay
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0.00 1.00 v in2 (in)
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0.02 1.02 v and1/ZN (AND2_X1)
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0.02 1.05 v buf1/Z (BUF_X1)
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0.00 1.05 v reg1/D (DFF_X1)
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1.05 data arrival time
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10.00 10.00 clock clk (rise edge)
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0.00 10.00 clock network delay (ideal)
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0.00 10.00 clock reconvergence pessimism
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10.00 ^ reg1/CK (DFF_X1)
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-0.04 9.96 library setup time
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9.96 data required time
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---------------------------------------------------------
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9.96 data required time
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-1.05 data arrival time
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---------------------------------------------------------
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8.91 slack (MET)
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--- find_timing_paths with path groups ---
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Warning 502: search_report_path_detail.tcl line 1, find_timing_paths -endpoint_count is deprecated. Use -endpoint_path_count instead.
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Found 6 paths
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--- find_timing_paths unique paths ---
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Warning 502: search_report_path_detail.tcl line 1, find_timing_paths -endpoint_count is deprecated. Use -endpoint_path_count instead.
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Found 3 unique paths
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--- Search internal commands ---
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tag_group_count: 6
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tag_count: 24
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clk_info_count: 4
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path_count: 76
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endpoint_violation_count max: 0
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endpoint_violation_count min: 0
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--- Startpoints and endpoints ---
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Startpoints: skipped (API removed)
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Endpoints: 3
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Endpoint count: 3
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--- Path group names ---
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Path group names: clk out_group reg_group asynchronous {path delay} {gated clock} unconstrained
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--- find_requireds ---
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--- report internal debug ---
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Group 0 hash = 2697898004198490802 ( 79)
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0 0 default ^min clk ^ clk_src clk crpr_pin null input in2
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1 2 default ^max clk ^ clk_src clk crpr_pin null input in2
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2 1 default vmin clk ^ clk_src clk crpr_pin null input in2
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3 3 default vmax clk ^ clk_src clk crpr_pin null input in2
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Group 1 hash = 1860950969858666218 ( 107)
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0 4 default ^min clk ^ clk_src clk crpr_pin null input in1 Group -from {in1}
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1 6 default ^max clk ^ clk_src clk crpr_pin null input in1 Group -from {in1}
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2 5 default vmin clk ^ clk_src clk crpr_pin null input in1 Group -from {in1}
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3 7 default vmax clk ^ clk_src clk crpr_pin null input in1 Group -from {in1}
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Group 2 hash = 17966741373156438452 ( 88)
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0 8 default ^min clk ^ (clock ideal) clk_src clk crpr_pin null
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1 12 default ^max clk ^ (clock ideal) clk_src clk crpr_pin null
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2 11 default vmin clk v (clock ideal) clk_src clk crpr_pin null
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3 15 default vmax clk v (clock ideal) clk_src clk crpr_pin null
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Group 3 hash = 17944144282683767210 ( 132)
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0 16 default ^min clk ^ clk_src clk crpr_pin null Group -from {in1}
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1 18 default ^max clk ^ clk_src clk crpr_pin null Group -from {in1}
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2 17 default vmin clk ^ clk_src clk crpr_pin null Group -from {in1}
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3 19 default vmax clk ^ clk_src clk crpr_pin null Group -from {in1}
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Group 4 hash = 17969506314027398258 ( 127)
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0 20 default ^min clk ^ clk_src clk crpr_pin null
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1 22 default ^max clk ^ clk_src clk crpr_pin null
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2 21 default vmin clk ^ clk_src clk crpr_pin null
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3 23 default vmax clk ^ clk_src clk crpr_pin null
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Group 5 hash = 17466906523001613852 ( 62)
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0 20 default ^min clk ^ clk_src clk crpr_pin null
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1 16 default ^min clk ^ clk_src clk crpr_pin null Group -from {in1}
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2 22 default ^max clk ^ clk_src clk crpr_pin null
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3 18 default ^max clk ^ clk_src clk crpr_pin null Group -from {in1}
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4 21 default vmin clk ^ clk_src clk crpr_pin null
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5 17 default vmin clk ^ clk_src clk crpr_pin null Group -from {in1}
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6 23 default vmax clk ^ clk_src clk crpr_pin null
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7 19 default vmax clk ^ clk_src clk crpr_pin null Group -from {in1}
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Longest hash bucket length 1 hash=62
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0 default ^min clk ^ clk_src clk crpr_pin null input in2
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1 default vmin clk ^ clk_src clk crpr_pin null input in2
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2 default ^max clk ^ clk_src clk crpr_pin null input in2
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3 default vmax clk ^ clk_src clk crpr_pin null input in2
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4 default ^min clk ^ clk_src clk crpr_pin null input in1 Group -from {in1}
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5 default vmin clk ^ clk_src clk crpr_pin null input in1 Group -from {in1}
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6 default ^max clk ^ clk_src clk crpr_pin null input in1 Group -from {in1}
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7 default vmax clk ^ clk_src clk crpr_pin null input in1 Group -from {in1}
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8 default ^min clk ^ (clock ideal) clk_src clk crpr_pin null
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9 default vmin clk ^ (clock ideal) clk_src clk crpr_pin null
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10 default ^min clk v (clock ideal) clk_src clk crpr_pin null
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11 default vmin clk v (clock ideal) clk_src clk crpr_pin null
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12 default ^max clk ^ (clock ideal) clk_src clk crpr_pin null
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13 default vmax clk ^ (clock ideal) clk_src clk crpr_pin null
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14 default ^max clk v (clock ideal) clk_src clk crpr_pin null
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15 default vmax clk v (clock ideal) clk_src clk crpr_pin null
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16 default ^min clk ^ clk_src clk crpr_pin null Group -from {in1}
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17 default vmin clk ^ clk_src clk crpr_pin null Group -from {in1}
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18 default ^max clk ^ clk_src clk crpr_pin null Group -from {in1}
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19 default vmax clk ^ clk_src clk crpr_pin null Group -from {in1}
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20 default ^min clk ^ clk_src clk crpr_pin null
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21 default vmin clk ^ clk_src clk crpr_pin null
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22 default ^max clk ^ clk_src clk crpr_pin null
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23 default vmax clk ^ clk_src clk crpr_pin null
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Longest hash bucket length 1 hash=6
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default/min clk ^ clk_src clk
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default/max clk ^ clk_src clk
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default/min clk v clk_src clk
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default/max clk v clk_src clk
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4 clk infos
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4 11
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8 4
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--- report_path_end header/footer ---
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Warning 502: search_report_path_detail.tcl line 1, find_timing_paths -endpoint_count is deprecated. Use -endpoint_path_count instead.
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Startpoint: reg1 (rising edge-triggered flip-flop clocked by clk)
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Endpoint: out1 (output port clocked by clk)
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Path Group: out_group
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 ^ reg1/CK (DFF_X1)
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0.08 0.08 ^ reg1/Q (DFF_X1)
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0.02 0.10 ^ buf2/Z (BUF_X1)
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0.00 0.10 ^ out1 (out)
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0.10 data arrival time
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10.00 10.00 clock clk (rise edge)
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0.00 10.00 clock network delay (ideal)
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0.00 10.00 clock reconvergence pessimism
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-2.00 8.00 output external delay
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8.00 data required time
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---------------------------------------------------------
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8.00 data required time
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-0.10 data arrival time
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---------------------------------------------------------
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7.90 slack (MET)
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Startpoint: in1 (input port clocked by clk)
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Endpoint: reg1 (rising edge-triggered flip-flop clocked by clk)
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Path Group: reg_group
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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1.00 1.00 v input external delay
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0.00 1.00 v in1 (in)
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0.02 1.02 v and1/ZN (AND2_X1)
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0.02 1.05 v buf1/Z (BUF_X1)
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0.00 1.05 v reg1/D (DFF_X1)
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1.05 data arrival time
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10.00 10.00 clock clk (rise edge)
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0.00 10.00 clock network delay (ideal)
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0.00 10.00 clock reconvergence pessimism
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10.00 ^ reg1/CK (DFF_X1)
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-0.04 9.96 library setup time
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9.96 data required time
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---------------------------------------------------------
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9.96 data required time
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-1.05 data arrival time
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---------------------------------------------------------
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8.92 slack (MET)
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Startpoint: in2 (input port clocked by clk)
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Endpoint: reg1 (rising edge-triggered flip-flop clocked by clk)
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Path Group: clk
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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1.00 1.00 v input external delay
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0.00 1.00 v in2 (in)
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0.02 1.02 v and1/ZN (AND2_X1)
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0.02 1.05 v buf1/Z (BUF_X1)
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0.00 1.05 v reg1/D (DFF_X1)
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1.05 data arrival time
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10.00 10.00 clock clk (rise edge)
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0.00 10.00 clock network delay (ideal)
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0.00 10.00 clock reconvergence pessimism
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10.00 ^ reg1/CK (DFF_X1)
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-0.04 9.96 library setup time
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9.96 data required time
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---------------------------------------------------------
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9.96 data required time
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-1.05 data arrival time
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---------------------------------------------------------
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8.91 slack (MET)
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--- slow_drivers ---
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Slow drivers: 3
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--- levelize ---
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