155 lines
1.5 KiB
Plaintext
155 lines
1.5 KiB
Plaintext
*SPEF "IEEE 1481-1998"
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*DESIGN "top"
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*DATE "Thu Feb 12 10:00:00 2026"
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*VENDOR "OpenSTA Test"
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*PROGRAM "OpenSTA"
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*VERSION "1.0"
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*DESIGN_FLOW "MISSING_NETS"
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*DIVIDER /
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*DELIMITER :
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*BUS_DELIMITER [ ]
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*T_UNIT 1.0 PS
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*C_UNIT 1.0 FF
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*R_UNIT 1.0 KOHM
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*L_UNIT 1.0 UH
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*NAME_MAP
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*1 in1
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*2 in2
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*3 clk1
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*4 clk2
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*5 clk3
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*6 out
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*7 r1q
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*8 r2q
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*9 u1z
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*10 u2z
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*POWER_NETS VDD
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*GROUND_NETS VSS
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*PORTS
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*1 I
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*2 I
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*3 I
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*4 I
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*5 I
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*6 O
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*D_NET *1 20.0
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*CONN
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*P *1 I
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*I r1:D I *L .0036
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*CAP
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1 *1 4.0
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2 r1:D 4.0
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3 *1 *7 2.0
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*RES
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4 *1 r1:D 3.0
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*END
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*D_NET *2 20.0
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*CONN
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*P *2 I
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*I r2:D I *L .0036
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*CAP
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1 *2 4.0
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2 r2:D 4.0
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3 *2 *8 2.0
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*RES
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4 *2 r2:D 3.0
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*END
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*D_NET *3 15.0
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*CONN
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*P *3 I
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*I r1:CLK I *L .0036
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*CAP
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1 *3 6.0
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2 r1:CLK 6.0
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*RES
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3 *3 r1:CLK 2.5
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*END
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*D_NET *4 15.0
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*CONN
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*P *4 I
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*I r2:CLK I *L .0036
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*CAP
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1 *4 6.0
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2 r2:CLK 6.0
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*RES
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3 *4 r2:CLK 2.5
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*END
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*D_NET *5 15.0
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*CONN
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*P *5 I
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*I r3:CLK I *L .0036
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*CAP
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1 *5 6.0
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2 r3:CLK 6.0
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*RES
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3 *5 r3:CLK 2.5
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*END
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*D_NET *7 25.0
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*CONN
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*I r1:Q O
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*I u2:A I *L .0086
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*CAP
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1 r1:Q 5.0
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2 u2:A 5.0
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3 r1:Q *9 3.0
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4 u2:A *8 2.0
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*RES
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5 r1:Q u2:A 2.0
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*END
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*D_NET *8 25.0
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*CONN
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*I r2:Q O
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*I u1:A I *L .0086
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*CAP
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1 r2:Q 5.0
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2 u1:A 5.0
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3 r2:Q *7 3.0
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*RES
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4 r2:Q u1:A 2.0
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*END
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*D_NET *9 20.0
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*CONN
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*I u1:Y O
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*I u2:B I *L .0086
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*CAP
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1 u1:Y 5.0
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2 u2:B 5.0
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3 u1:Y *10 2.5
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*RES
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4 u1:Y u2:B 2.5
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*END
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*D_NET *10 20.0
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*CONN
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*I u2:Y O
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*I r3:D I *L .0086
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*CAP
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1 u2:Y 5.0
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2 r3:D 5.0
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3 u2:Y *9 2.5
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*RES
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4 u2:Y r3:D 2.5
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*END
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*D_NET *6 15.0
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*CONN
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*I r3:Q O
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*P *6 O
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*CAP
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1 r3:Q 6.0
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2 *6 6.0
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*RES
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3 r3:Q *6 2.5
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*END
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