114 lines
3.2 KiB
C++
114 lines
3.2 KiB
C++
// OpenSTA, Static Timing Analyzer
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// Copyright (c) 2020, Parallax Software, Inc.
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <https://www.gnu.org/licenses/>.
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#include "SimpleRCDelayCalc.hh"
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#include "TimingArc.hh"
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#include "Liberty.hh"
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#include "Network.hh"
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#include "Sdc.hh"
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#include "Parasitics.hh"
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#include "DcalcAnalysisPt.hh"
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namespace sta {
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ArcDelayCalc *
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makeSimpleRCDelayCalc(StaState *sta)
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{
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return new SimpleRCDelayCalc(sta);
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}
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SimpleRCDelayCalc::SimpleRCDelayCalc(StaState *sta) :
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RCDelayCalc(sta)
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{
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}
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ArcDelayCalc *
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SimpleRCDelayCalc::copy()
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{
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return new SimpleRCDelayCalc(this);
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}
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void
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SimpleRCDelayCalc::inputPortDelay(const Pin *port_pin,
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float in_slew,
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const RiseFall *rf,
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Parasitic *parasitic,
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const DcalcAnalysisPt *dcalc_ap)
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{
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pvt_ = dcalc_ap->operatingConditions();
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RCDelayCalc::inputPortDelay(port_pin, in_slew, rf, parasitic, dcalc_ap);
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}
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void
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SimpleRCDelayCalc::gateDelay(const LibertyCell *drvr_cell,
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TimingArc *arc,
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const Slew &in_slew,
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float load_cap,
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Parasitic *drvr_parasitic,
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float related_out_cap,
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const Pvt *pvt,
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const DcalcAnalysisPt *dcalc_ap,
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// Return values.
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ArcDelay &gate_delay,
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Slew &drvr_slew)
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{
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drvr_parasitic_ = drvr_parasitic;
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drvr_rf_ = arc->toTrans()->asRiseFall();
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drvr_cell_ = drvr_cell;
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drvr_library_ = drvr_cell->libertyLibrary();
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pvt_ = pvt;
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LumpedCapDelayCalc::gateDelay(drvr_cell, arc, in_slew,
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load_cap, drvr_parasitic, related_out_cap,
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pvt, dcalc_ap,
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gate_delay, drvr_slew);
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}
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void
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SimpleRCDelayCalc::loadDelay(const Pin *load_pin,
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ArcDelay &wire_delay,
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Slew &load_slew)
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{
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ArcDelay wire_delay1 = 0.0;
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Slew load_slew1 = drvr_slew_;
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bool elmore_exists = false;
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float elmore = 0.0;
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if (drvr_parasitic_)
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parasitics_->findElmore(drvr_parasitic_, load_pin, elmore, elmore_exists);
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if (elmore_exists) {
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if (drvr_library_ && drvr_library_->wireSlewDegradationTable(drvr_rf_)) {
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wire_delay1 = elmore;
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load_slew1 = drvr_library_->degradeWireSlew(drvr_cell_, drvr_rf_,
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pvt_,
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delayAsFloat(drvr_slew_),
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delayAsFloat(wire_delay1));
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}
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else if (parasitics_->isReducedParasiticNetwork(drvr_parasitic_))
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dspfWireDelaySlew(load_pin, elmore, wire_delay1, load_slew1);
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else {
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// For RSPF on an input port the elmore delay is used for the
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// wire delay and the slew is copied from the driver.
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wire_delay1 = elmore;
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load_slew1 = drvr_slew_;
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}
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}
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thresholdAdjust(load_pin, wire_delay1, load_slew1);
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wire_delay = wire_delay1;
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load_slew = load_slew1 * multi_drvr_slew_factor_;
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}
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} // namespace
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