95 lines
2.9 KiB
C++
95 lines
2.9 KiB
C++
// OpenSTA, Static Timing Analyzer
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// Copyright (c) 2025, Parallax Software, Inc.
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <https://www.gnu.org/licenses/>.
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//
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// The origin of this software must not be misrepresented; you must not
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// claim that you wrote the original software.
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//
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// Altered source versions must be plainly marked as such, and must not be
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// misrepresented as being the original software.
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//
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// This notice may not be removed or altered from any source distribution.
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#pragma once
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#include "SdcClass.hh"
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#include "StaState.hh"
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#include "SearchClass.hh"
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namespace sta {
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class CrprPaths;
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// Clock Reconvergence Pessimism Removal.
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class CheckCrpr : public StaState
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{
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public:
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explicit CheckCrpr(StaState *sta);
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// Find the maximum possible crpr (clock min/max delta delay) for path.
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Arrival maxCrpr(const ClkInfo *clk_info);
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// Timing check CRPR.
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Crpr checkCrpr(const Path *src_clk_path,
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const Path *tgt_clk_path);
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void checkCrpr(const Path *src_path,
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const Path *tgt_clk_path,
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// Return values.
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Crpr &crpr,
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Pin *&crpr_pin);
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// Output delay CRPR.
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Crpr outputDelayCrpr(const Path *src_clk_path,
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const ClockEdge *tgt_clk_edge);
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void outputDelayCrpr(const Path *src_clk_path,
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const ClockEdge *tgt_clk_edge,
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// Return values.
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Crpr &crpr,
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Pin *&crpr_pin);
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private:
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void clkPathPrev(const Path *path,
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Path &prev);
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Arrival otherMinMaxArrival(const Path *path);
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void checkCrpr1(const Path *src_path,
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const Path *tgt_clk_path,
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bool same_pin,
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// Return values.
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Crpr &crpr,
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Pin *&crpr_pin);
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void outputDelayCrpr1(const Path *src_path,
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const ClockEdge *tgt_clk_edge,
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const PathAnalysisPt *tgt_path_ap,
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bool same_pin,
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// Return values.
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Crpr &crpr,
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Pin *&crpr_pin);
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bool crprPossible(const Clock *clk1,
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const Clock *clk2);
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ConstPathSeq genClkSrcPaths(const Path *path);
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void findCrpr(const Path *src_clk_path,
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const Path *tgt_clk_path,
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bool same_pin,
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// Return values.
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Crpr &crpr,
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Pin *&common_pin);
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Path *portClkPath(const ClockEdge *clk_edge,
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const Pin *clk_src_pin,
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const PathAnalysisPt *path_ap);
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Crpr findCrpr1(const Path *src_clk_path,
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const Path *tgt_clk_path);
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float crprArrivalDiff(const Path *path);
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};
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} // namespace
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