OpenSTA/search/test/search_min_period_short.ok

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--- report_check_types -min_period (non-verbose = short) ---
--- report_check_types -min_period -verbose ---
--- report_check_types -min_period -violators ---
--- report_check_types -min_period -violators -verbose ---
--- min_period_check_slack short ---
min_period_check_slack: skipped (API removed)
--- min_period_violations short/verbose ---
min_period_violations: skipped (API removed)
--- max_skew_check_slack ---
max_skew_check_slack: skipped (API removed)
--- max_skew_violations ---
max_skew_violations: skipped (API removed)
--- report_check_types -max_skew (short) ---
--- report_check_types -max_skew -verbose ---
--- report_check_types all with tight clock ---
max slew
Pin Limit Slew Slack
------------------------------------------------------------
reg1/QN 0.20 0.01 0.19 (MET)
max capacitance
Pin Limit Cap Slack
------------------------------------------------------------
buf1/Z 60.65 1.14 59.51 (MET)
Required Actual
Pin Width Width Slack
------------------------------------------------------------
reg1/CK (high) 0.05 0.02 -0.03 (VIOLATED)
max slew
Pin reg1/QN v
max slew 0.20
slew 0.01
----------------
Slack 0.19 (MET)
max capacitance
Pin buf1/Z ^
max capacitance 60.65
capacitance 1.14
-----------------------
Slack 59.51 (MET)
Pin: reg1/CK
Check: sequential_clock_pulse_width
Delay Time Description
---------------------------------------------------------
0.00 0.00 clock fast_clk (rise edge)
0.00 0.00 clock network delay (ideal)
0.00 0.00 reg1/CK
0.00 open edge arrival time
0.02 0.02 clock fast_clk (fall edge)
0.00 0.02 clock network delay (ideal)
0.00 0.02 reg1/CK
0.00 0.02 clock reconvergence pessimism
0.02 close edge arrival time
---------------------------------------------------------
0.05 required pulse width (high)
0.02 actual pulse width
---------------------------------------------------------
-0.03 slack (VIOLATED)
--- report_check_types -violators ---
Required Actual
Pin Width Width Slack
------------------------------------------------------------
reg1/CK (high) 0.05 0.02 -0.03 (VIOLATED)
reg1/CK (low) 0.05 0.02 -0.03 (VIOLATED)
--- report_clock_min_period ---
fast_clk period_min = 0.00 fmax = inf
fast_clk period_min = 0.00 fmax = inf
fast_clk period_min = 0.11 fmax = 9067.34
--- Now with normal clock period ---
--- report_check_types with normal clock ---
--- min_pulse_width short and verbose ---
Required Actual
Pin Width Width Slack
------------------------------------------------------------
reg1/CK (high) 0.05 5.00 4.95 (MET)
Pin: reg1/CK
Check: sequential_clock_pulse_width
Delay Time Description
---------------------------------------------------------
0.00 0.00 clock normal_clk (rise edge)
0.00 0.00 clock network delay (ideal)
0.00 0.00 reg1/CK
0.00 open edge arrival time
5.00 5.00 clock normal_clk (fall edge)
0.00 5.00 clock network delay (ideal)
0.00 5.00 reg1/CK
0.00 5.00 clock reconvergence pessimism
5.00 close edge arrival time
---------------------------------------------------------
0.05 required pulse width (high)
5.00 actual pulse width
---------------------------------------------------------
4.95 slack (MET)
Required Actual
Pin Width Width Slack
------------------------------------------------------------
reg1/CK (high) 0.05 5.00 4.95 (MET)
Pin: reg1/CK
Check: sequential_clock_pulse_width
Delay Time Description
---------------------------------------------------------
0.00 0.00 clock normal_clk (rise edge)
0.00 0.00 clock network delay (ideal)
0.00 0.00 reg1/CK
0.00 open edge arrival time
5.00 5.00 clock normal_clk (fall edge)
0.00 5.00 clock network delay (ideal)
0.00 5.00 reg1/CK
0.00 5.00 clock reconvergence pessimism
5.00 close edge arrival time
---------------------------------------------------------
0.05 required pulse width (high)
5.00 actual pulse width
---------------------------------------------------------
4.95 slack (MET)