83 lines
2.7 KiB
Plaintext
83 lines
2.7 KiB
Plaintext
No paths found.
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No paths found.
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No paths found.
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Startpoint: reg2 (rising edge-triggered flip-flop clocked by clk1)
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Endpoint: out1 (output port clocked by clk1)
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Path Group: group_clk1
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk1 (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 ^ reg2/CK (DFF_X1)
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0.08 0.08 ^ reg2/Q (DFF_X1)
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0.00 0.08 ^ out1 (out)
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0.08 data arrival time
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10.00 10.00 clock clk1 (rise edge)
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0.00 10.00 clock network delay (ideal)
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0.00 10.00 clock reconvergence pessimism
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-3.00 7.00 output external delay
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7.00 data required time
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---------------------------------------------------------
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7.00 data required time
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-0.08 data arrival time
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---------------------------------------------------------
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6.92 slack (MET)
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No paths found.
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Startpoint: reg2 (rising edge-triggered flip-flop clocked by clk1)
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Endpoint: out1 (output port clocked by clk1)
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Path Group: group_clk1
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk1 (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 ^ reg2/CK (DFF_X1)
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0.08 0.08 ^ reg2/Q (DFF_X1)
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0.00 0.08 ^ out1 (out)
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0.08 data arrival time
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10.00 10.00 clock clk1 (rise edge)
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0.00 10.00 clock network delay (ideal)
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0.00 10.00 clock reconvergence pessimism
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-3.00 7.00 output external delay
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7.00 data required time
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---------------------------------------------------------
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7.00 data required time
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-0.08 data arrival time
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---------------------------------------------------------
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6.92 slack (MET)
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Startpoint: reg3 (rising edge-triggered flip-flop clocked by clk2)
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Endpoint: out2 (output port clocked by clk2)
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Path Group: clk2
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk2 (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 ^ reg3/CK (DFF_X1)
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0.08 0.08 ^ reg3/Q (DFF_X1)
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0.00 0.08 ^ out2 (out)
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0.08 data arrival time
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20.00 20.00 clock clk2 (rise edge)
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0.00 20.00 clock network delay (ideal)
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0.00 20.00 clock reconvergence pessimism
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-3.00 17.00 output external delay
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17.00 data required time
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---------------------------------------------------------
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17.00 data required time
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-0.08 data arrival time
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---------------------------------------------------------
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16.92 slack (MET)
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