95 lines
4.1 KiB
C++
95 lines
4.1 KiB
C++
// OpenSTA, Static Timing Analyzer
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// Copyright (c) 2024, Parallax Software, Inc.
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <https://www.gnu.org/licenses/>.
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#pragma once
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#include "ArcDelayCalc.hh"
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namespace sta {
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// Unit delay calculator.
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class UnitDelayCalc : public ArcDelayCalc
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{
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public:
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UnitDelayCalc(StaState *sta);
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ArcDelayCalc *copy() override;
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const char *name() const override { return "unit"; }
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Parasitic *findParasitic(const Pin *drvr_pin,
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const RiseFall *rf,
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const DcalcAnalysisPt *dcalc_ap) override;
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bool reduceSupported() const override { return false; }
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Parasitic *reduceParasitic(const Parasitic *parasitic_network,
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const Pin *drvr_pin,
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const RiseFall *rf,
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const DcalcAnalysisPt *dcalc_ap) override;
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void reduceParasitic(const Parasitic *parasitic_network,
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const Net *net,
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const Corner *corner,
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const MinMaxAll *min_max) override;
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void setDcalcArgParasiticSlew(ArcDcalcArg &gate,
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const DcalcAnalysisPt *dcalc_ap) override;
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void setDcalcArgParasiticSlew(ArcDcalcArgSeq &gates,
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const DcalcAnalysisPt *dcalc_ap) override;
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ArcDcalcResult inputPortDelay(const Pin *port_pin,
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float in_slew,
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const RiseFall *rf,
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const Parasitic *parasitic,
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const LoadPinIndexMap &load_pin_index_map,
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const DcalcAnalysisPt *dcalc_ap) override;
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ArcDcalcResult gateDelay(const Pin *drvr_pin,
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const TimingArc *arc,
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const Slew &in_slew,
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// Pass in load_cap or parasitic.
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float load_cap,
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const Parasitic *parasitic,
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const LoadPinIndexMap &load_pin_index_map,
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const DcalcAnalysisPt *dcalc_ap) override;
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ArcDcalcResultSeq gateDelays(ArcDcalcArgSeq &args,
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const LoadPinIndexMap &load_pin_index_map,
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const DcalcAnalysisPt *dcalc_ap) override;
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ArcDelay checkDelay(const Pin *check_pin,
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const TimingArc *arc,
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const Slew &from_slew,
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const Slew &to_slew,
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float related_out_cap,
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const DcalcAnalysisPt *dcalc_ap) override;
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string reportGateDelay(const Pin *drvr_pin,
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const TimingArc *arc,
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const Slew &in_slew,
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float load_cap,
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const Parasitic *parasitic,
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const LoadPinIndexMap &load_pin_index_map,
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const DcalcAnalysisPt *dcalc_ap,
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int digits) override;
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string reportCheckDelay(const Pin *check_pin,
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const TimingArc *arc,
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const Slew &from_slew,
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const char *from_slew_annotation,
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const Slew &to_slew,
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float related_out_cap,
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const DcalcAnalysisPt *dcalc_ap,
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int digits) override;
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void finishDrvrPin() override;
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protected:
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ArcDcalcResult unitDelayResult(const LoadPinIndexMap &load_pin_index_map);
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};
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ArcDelayCalc *
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makeUnitDelayCalc(StaState *sta);
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} // namespace
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