19 lines
476 B
Tcl
19 lines
476 B
Tcl
set clk_name clk
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set clk_port_name clk
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set clk_period 4.8
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set clk_io_pct 0.2
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set clk_port [get_ports $clk_port_name]
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create_clock -name $clk_name -period $clk_period $clk_port
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set non_clock_inputs [list]
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foreach input [all_inputs] {
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if { $clk_port != $input } {
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lappend $non_clock_inputs $input
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}
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}
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set_input_delay [expr $clk_period * $clk_io_pct] -clock $clk_name $non_clock_inputs
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set_output_delay [expr $clk_period * $clk_io_pct] -clock $clk_name [all_outputs]
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