137 lines
3.0 KiB
C++
137 lines
3.0 KiB
C++
// OpenSTA, Static Timing Analyzer
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// Copyright (c) 2024, Parallax Software, Inc.
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <https://www.gnu.org/licenses/>.
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#include "ArcDelayCalc.hh"
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namespace sta {
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ArcDelayCalc::ArcDelayCalc(StaState *sta):
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StaState(sta)
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{
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}
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void
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ArcDelayCalc::gateDelay(const TimingArc *arc,
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const Slew &in_slew,
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float load_cap,
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const Parasitic *parasitic,
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float,
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const Pvt *,
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const DcalcAnalysisPt *dcalc_ap,
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// Return values.
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ArcDelay &gate_delay,
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Slew &drvr_slew)
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{
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LoadPinIndexMap load_pin_index_map(network_);
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ArcDcalcResult dcalc_result = gateDelay(nullptr, arc, in_slew, load_cap, parasitic,
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load_pin_index_map, dcalc_ap);
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gate_delay = dcalc_result.gateDelay();
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drvr_slew = dcalc_result.drvrSlew();
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}
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////////////////////////////////////////////////////////////////
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ArcDcalcArg::ArcDcalcArg() :
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drvr_pin_(nullptr),
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edge_(nullptr),
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arc_(nullptr),
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in_slew_(0.0),
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parasitic_(nullptr)
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{
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}
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ArcDcalcArg::ArcDcalcArg(const Pin *drvr_pin,
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Edge *edge,
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const TimingArc *arc,
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const Slew in_slew,
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const Parasitic *parasitic) :
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drvr_pin_(drvr_pin),
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edge_(edge),
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arc_(arc),
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in_slew_(in_slew),
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parasitic_(parasitic)
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{
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}
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void
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ArcDcalcArg::setParasitic(const Parasitic *parasitic)
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{
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parasitic_ = parasitic;
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}
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////////////////////////////////////////////////////////////////
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ArcDcalcResult::ArcDcalcResult() :
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gate_delay_(0.0),
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drvr_slew_(0.0)
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{
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}
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ArcDcalcResult::ArcDcalcResult(size_t load_count) :
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gate_delay_(0.0),
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drvr_slew_(0.0)
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{
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wire_delays_.resize(load_count);
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load_slews_.resize(load_count);
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}
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void
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ArcDcalcResult::setGateDelay(ArcDelay gate_delay)
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{
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gate_delay_ = gate_delay;
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}
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void
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ArcDcalcResult::setDrvrSlew(Slew drvr_slew)
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{
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drvr_slew_ = drvr_slew;
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}
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ArcDelay
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ArcDcalcResult::wireDelay(size_t load_idx) const
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{
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return wire_delays_[load_idx];
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}
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void
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ArcDcalcResult::setWireDelay(size_t load_idx,
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ArcDelay wire_delay)
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{
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wire_delays_[load_idx] = wire_delay;
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}
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void
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ArcDcalcResult::setLoadCount(size_t load_count)
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{
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wire_delays_.resize(load_count);
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load_slews_.resize(load_count);
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}
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Slew
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ArcDcalcResult::loadSlew(size_t load_idx) const
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{
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return load_slews_[load_idx];
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}
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void
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ArcDcalcResult::setLoadSlew(size_t load_idx,
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Slew load_slew)
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{
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load_slews_[load_idx] = load_slew;
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}
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} // namespace
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