142 lines
4.6 KiB
Tcl
142 lines
4.6 KiB
Tcl
# Test graph construction with bidirectional pins, reconvergent paths,
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# and various edge/vertex operations.
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# Targets: Graph.cc uncovered paths:
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# makePinVertices for bidirect pins
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# pinVertices for bidirect direction
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# pinDrvrVertex for bidirect
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# makePortInstanceEdges: bidirect from_bidirect_drvr_vertex path
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# makeWireEdgesFromPin with multiple drivers
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# hasFaninOne
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# gateEdgeArc
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# deleteVertex via delete operations
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# isIsolatedNet
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# vertex/edge iterators
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source ../../test/helpers.tcl
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read_liberty ../../test/nangate45/Nangate45_typ.lib
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read_verilog graph_bidirect.v
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link_design graph_bidirect
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#---------------------------------------------------------------
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# Test 1: Graph construction and basic timing
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#---------------------------------------------------------------
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puts "--- Test 1: graph with reconvergent paths ---"
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create_clock -name clk -period 10 [get_ports clk]
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set_input_delay -clock clk 0 [get_ports {d1 d2 d3 d4}]
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set_output_delay -clock clk 0 [get_ports {q1 q2 q3 q4}]
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set_input_transition 0.1 [get_ports {d1 d2 d3 d4 clk}]
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report_checks
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report_checks -path_delay min
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#---------------------------------------------------------------
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# Test 2: Multiple path queries (exercises graph traversal)
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#---------------------------------------------------------------
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puts "--- Test 2: path queries ---"
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report_checks -from [get_ports d1] -to [get_ports q1]
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report_checks -from [get_ports d1] -to [get_ports q2]
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report_checks -from [get_ports d2] -to [get_ports q1]
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report_checks -from [get_ports d3] -to [get_ports q3]
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report_checks -from [get_ports d4] -to [get_ports q3]
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report_checks -from [get_ports d1] -to [get_ports q4]
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report_checks -from [get_ports d3] -to [get_ports q4]
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#---------------------------------------------------------------
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# Test 3: Fields that exercise graph delay/slew queries
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#---------------------------------------------------------------
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puts "--- Test 3: report with fields ---"
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report_checks -fields {slew cap input_pins nets fanout}
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report_checks -format full_clock
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report_checks -path_delay min -fields {slew cap}
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#---------------------------------------------------------------
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# Test 4: Fanin/fanout queries through reconvergent paths
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#---------------------------------------------------------------
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puts "--- Test 4: fanin/fanout ---"
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set fi [get_fanin -to [get_ports q2] -flat]
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puts "fanin to q2: [llength $fi]"
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set fo [get_fanout -from [get_ports d1] -flat]
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puts "fanout from d1: [llength $fo]"
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set fi_cells [get_fanin -to [get_ports q2] -only_cells]
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puts "fanin cells to q2: [llength $fi_cells]"
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set fo_cells [get_fanout -from [get_ports d1] -only_cells]
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puts "fanout cells from d1: [llength $fo_cells]"
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set fi_q3 [get_fanin -to [get_ports q3] -flat]
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puts "fanin to q3: [llength $fi_q3]"
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set fo_d3 [get_fanout -from [get_ports d3] -flat]
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puts "fanout from d3: [llength $fo_d3]"
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#---------------------------------------------------------------
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# Test 5: report_dcalc exercises graph edge arc queries
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#---------------------------------------------------------------
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puts "--- Test 5: report_dcalc ---"
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report_dcalc -from [get_pins buf1/A] -to [get_pins buf1/Z] -max
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puts "dcalc buf1: done"
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report_dcalc -from [get_pins and1/A1] -to [get_pins and1/ZN] -max
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puts "dcalc and1 A1: done"
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report_dcalc -from [get_pins and1/A2] -to [get_pins and1/ZN] -max
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puts "dcalc and1 A2: done"
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report_dcalc -from [get_pins or1/A1] -to [get_pins or1/ZN] -max
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puts "dcalc or1 A1: done"
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report_dcalc -from [get_pins nand1/A1] -to [get_pins nand1/ZN] -max
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puts "dcalc nand1: done"
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report_dcalc -from [get_pins nor1/A1] -to [get_pins nor1/ZN] -max
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puts "dcalc nor1: done"
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report_dcalc -from [get_pins reg1/CK] -to [get_pins reg1/Q] -max
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puts "dcalc reg1: done"
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#---------------------------------------------------------------
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# Test 6: Graph vertex/edge counts
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#---------------------------------------------------------------
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puts "--- Test 6: network queries ---"
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set all_pins [get_pins */*]
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puts "total pins: [llength $all_pins]"
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set all_nets [get_nets *]
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puts "total nets: [llength $all_nets]"
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foreach net_name {n1 n2 n3 n4 n5 n6 n7 n8 n9 n10} {
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report_net $net_name
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}
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foreach inst_name {buf1 buf2 inv1 inv2 and1 or1 nand1 nor1 and2 or2 reg1 reg2 reg3 reg4} {
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report_instance $inst_name
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}
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#---------------------------------------------------------------
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# Test 7: Add and remove instances (exercises deleteVertex, graph modify)
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#---------------------------------------------------------------
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puts "--- Test 7: modify graph ---"
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set new_net [make_net test_net]
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set new_inst [make_instance test_buf BUF_X1]
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connect_pin test_net test_buf/A
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report_checks
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disconnect_pin test_net test_buf/A
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delete_instance test_buf
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delete_net test_net
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report_checks
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