17 lines
443 B
Tcl
17 lines
443 B
Tcl
# Test delay calculation
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read_liberty ../../test/nangate45/Nangate45_typ.lib
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read_verilog dcalc_test1.v
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link_design dcalc_test1
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create_clock -name clk -period 10 [get_ports clk]
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set_input_delay -clock clk 0 [get_ports in1]
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set_output_delay -clock clk 0 [get_ports out1]
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# Force delay calculation
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report_checks -from [get_ports in1] -to [get_ports out1]
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# Report arrival/required
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report_checks -path_delay min
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report_checks -path_delay max
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