OpenSTA/spice
Jaehyun Kim 547737f71e test: Apply review feedback - part2
- Remove stale line-number coverage comments (# Targets: line NNN, hit=0)
- Remove useless file-existence checks from verilog/sdf tests
- Delete 21 orphaned dcalc Tcl tests (C++ tests already cover them)
- Rename liberty_ccsn_ecsm -> liberty_ccsn (no ECSM libs available)
- Fix liberty_sky130_corners to use define_corners/-corner for real multi-corner testing
- Add report_checks per wireload model in liberty_wireload
- Fix test/regression to work from test/ directory (label mismatch)
- Refactor all module CMakeLists.txt with sta_module_tests() macro

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
2026-02-20 01:13:42 +09:00
..
test test: Apply review feedback - part2 2026-02-20 01:13:42 +09:00
WritePathSpice.cc rm using std::string from headers 2025-05-22 09:25:56 -07:00
WritePathSpice.hh update copyright 2025-01-21 18:54:33 -07:00
WriteSpice.cc WriteSpice rm dead code 2026-01-11 19:52:55 -08:00
WriteSpice.hh Verilog make pins for liberty pg_pins resolves #326 2025-11-07 11:55:43 -07:00
WriteSpice.i class Path replaces PathVertex etc 2025-03-26 18:21:03 -07:00
WriteSpice.tcl update copyright 2025-01-21 18:54:33 -07:00
Xyce.cc update copyright 2025-01-21 18:54:33 -07:00
Xyce.hh update copyright 2025-01-21 18:54:33 -07:00