83 lines
2.4 KiB
Tcl
83 lines
2.4 KiB
Tcl
# Test Latches.cc - latch timing analysis
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read_liberty ../../test/nangate45/Nangate45_typ.lib
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read_verilog search_latch.v
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link_design search_latch
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create_clock -name clk -period 10 [get_ports clk]
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set_input_delay -clock clk 1.0 [get_ports in1]
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set_input_delay -clock clk 1.0 [get_ports in2]
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set_output_delay -clock clk 2.0 [get_ports out1]
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set_output_delay -clock clk 2.0 [get_ports out2]
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puts "--- report_checks max through latch ---"
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report_checks -path_delay max
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puts "--- report_checks min through latch ---"
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report_checks -path_delay min
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puts "--- report_checks min_max ---"
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report_checks -path_delay min_max
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puts "--- report_checks full_clock through latch ---"
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report_checks -format full_clock -path_delay max
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puts "--- report_checks full_clock_expanded through latch ---"
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report_checks -format full_clock_expanded -path_delay max
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puts "--- report_checks to latch output ---"
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report_checks -to [get_pins latch1/Q] -path_delay max
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puts "--- report_checks from latch output ---"
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report_checks -from [get_pins latch1/Q] -path_delay max
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puts "--- report_check_types with latch ---"
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report_check_types -verbose
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puts "--- check_setup with latch ---"
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check_setup -verbose
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puts "--- report_clock_skew ---"
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report_clock_skew -setup
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report_clock_skew -hold
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puts "--- report_clock_latency ---"
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report_clock_latency
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puts "--- report_pulse_width_checks ---"
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report_pulse_width_checks -verbose
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puts "--- find_timing_paths through latch ---"
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set paths [find_timing_paths -path_delay max -endpoint_path_count 5]
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puts "Found [llength $paths] paths"
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foreach pe $paths {
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puts " path to [get_full_name [$pe pin]] slack=[$pe slack]"
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}
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puts "--- all_registers with latch ---"
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set reg_cells [all_registers -cells]
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puts "Register cells: [llength $reg_cells]"
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foreach cell $reg_cells {
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puts " [get_full_name $cell]"
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}
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set reg_cells_lt [all_registers -cells -level_sensitive]
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puts "Level-sensitive cells: [llength $reg_cells_lt]"
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set reg_cells_et [all_registers -cells -edge_triggered]
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puts "Edge-triggered cells: [llength $reg_cells_et]"
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set data_pins [all_registers -data_pins]
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puts "Data pins: [llength $data_pins]"
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set clk_pins [all_registers -clock_pins]
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puts "Clock pins: [llength $clk_pins]"
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set out_pins [all_registers -output_pins]
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puts "Output pins: [llength $out_pins]"
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puts "--- report_tns/report_wns with latch ---"
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report_tns -max
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report_wns -max
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report_worst_slack -max
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report_worst_slack -min
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