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# Test power reporting
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read_liberty ../../test/sky130hd/sky130_fd_sc_hd__tt_025C_1v80.lib
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read_verilog power_test1.v
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link_design power_test1
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create_clock -name clk -period 10 [get_ports clk]
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set_input_delay -clock clk 0 [get_ports in1]
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# Report power
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report_power
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