97 lines
3.1 KiB
Tcl
97 lines
3.1 KiB
Tcl
# Test exception path SDC commands for code coverage
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read_liberty ../../test/nangate45/Nangate45_typ.lib
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read_verilog sdc_test2.v
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link_design sdc_test2
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# Setup clocks
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create_clock -name clk1 -period 10 [get_ports clk1]
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create_clock -name clk2 -period 20 [get_ports clk2]
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# Setup basic delays
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set_input_delay -clock clk1 2.0 [get_ports in1]
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set_input_delay -clock clk1 2.0 [get_ports in2]
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set_input_delay -clock clk1 2.0 [get_ports in3]
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set_output_delay -clock clk1 3.0 [get_ports out1]
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set_output_delay -clock clk2 3.0 [get_ports out2]
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############################################################
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# set_false_path
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############################################################
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# False path from port to port
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set_false_path -from [get_ports in1] -to [get_ports out1]
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# False path with -through
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set_false_path -from [get_ports in2] -through [get_pins and1/ZN] -to [get_ports out1]
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# False path with rise_from/fall_to
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set_false_path -rise_from [get_ports in3] -fall_to [get_ports out2]
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# False path between clock domains
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set_false_path -from [get_clocks clk1] -to [get_clocks clk2]
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# Report to verify false paths
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report_checks -from [get_ports in1] -to [get_ports out1]
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############################################################
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# Reset all exceptions and re-add other types
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############################################################
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unset_path_exceptions -from [get_ports in1] -to [get_ports out1]
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unset_path_exceptions -from [get_ports in2] -through [get_pins and1/ZN] -to [get_ports out1]
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unset_path_exceptions -rise_from [get_ports in3] -fall_to [get_ports out2]
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unset_path_exceptions -from [get_clocks clk1] -to [get_clocks clk2]
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############################################################
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# set_multicycle_path
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############################################################
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# Setup multicycle
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set_multicycle_path -setup 2 -from [get_clocks clk1] -to [get_clocks clk1]
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# Hold multicycle
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set_multicycle_path -hold 1 -from [get_clocks clk1] -to [get_clocks clk1]
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# Multicycle from specific pin
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set_multicycle_path -setup 3 -from [get_ports in1] -to [get_ports out1]
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report_checks -from [get_ports in1] -to [get_ports out1]
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# Unset multicycle paths
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unset_path_exceptions -setup -from [get_clocks clk1] -to [get_clocks clk1]
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unset_path_exceptions -hold -from [get_clocks clk1] -to [get_clocks clk1]
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unset_path_exceptions -setup -from [get_ports in1] -to [get_ports out1]
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############################################################
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# set_max_delay / set_min_delay
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############################################################
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set_max_delay -from [get_ports in1] -to [get_ports out1] 8.0
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set_min_delay -from [get_ports in1] -to [get_ports out1] 1.0
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report_checks -from [get_ports in1] -to [get_ports out1]
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# Unset the delay constraints
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unset_path_exceptions -from [get_ports in1] -to [get_ports out1]
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############################################################
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# group_path
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############################################################
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group_path -name group_clk1 -from [get_clocks clk1]
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group_path -name group_io -from [get_ports in1] -to [get_ports out1]
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report_checks -path_group group_clk1
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report_checks -path_group group_io
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# Final report
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report_checks
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