199 lines
6.5 KiB
Tcl
199 lines
6.5 KiB
Tcl
# Test clock groups and clock sense for code coverage
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# Targets: Sdc.cc (makeClockGroups, makeClkGroupExclusions, sameClockGroup,
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# setClockSense, clkStopPropagation, removeClockGroups*),
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# ClockGroups.cc, WriteSdc.cc (writeClockGroups, writeClockSense),
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# Clock.cc (edge queries, waveform handling)
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source ../../test/helpers.tcl
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read_liberty ../../test/nangate45/Nangate45_typ.lib
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read_verilog sdc_test2.v
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link_design sdc_test2
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############################################################
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# Create multiple clocks
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############################################################
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create_clock -name clk1 -period 10 [get_ports clk1]
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create_clock -name clk2 -period 20 -waveform {0 10} [get_ports clk2]
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create_clock -name vclk1 -period 8
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create_clock -name vclk2 -period 12
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create_clock -name clk1_2x -period 5 -add [get_ports clk1]
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# Generated clocks
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create_generated_clock -name gclk1 -source [get_ports clk1] -divide_by 2 [get_pins reg1/Q]
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create_generated_clock -name gclk2 -source [get_ports clk2] -multiply_by 2 [get_pins reg3/Q]
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# IO delays
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set_input_delay -clock clk1 2.0 [get_ports in1]
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set_input_delay -clock clk1 2.0 [get_ports in2]
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set_input_delay -clock clk2 2.0 [get_ports in3]
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set_output_delay -clock clk1 3.0 [get_ports out1]
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set_output_delay -clock clk2 3.0 [get_ports out2]
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############################################################
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# Clock groups - asynchronous
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############################################################
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set_clock_groups -asynchronous -name async_group1 \
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-group {clk1 clk1_2x gclk1} \
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-group {clk2 gclk2}
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# Write SDC with async groups
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set sdc_file1 [make_result_file sdc_clk_grp_async.sdc]
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write_sdc -no_timestamp $sdc_file1
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diff_files sdc_clk_grp_async.sdcok $sdc_file1
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report_checks
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# Remove async groups
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unset_clock_groups -asynchronous -name async_group1
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############################################################
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# Clock groups - logically exclusive
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############################################################
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set_clock_groups -logically_exclusive -name logical_group1 \
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-group {clk1 clk1_2x} \
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-group {vclk1}
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# Write SDC with logically exclusive groups
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set sdc_file2 [make_result_file sdc_clk_grp_logical.sdc]
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write_sdc -no_timestamp $sdc_file2
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diff_files sdc_clk_grp_logical.sdcok $sdc_file2
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# Remove logically exclusive
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unset_clock_groups -logically_exclusive -name logical_group1
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############################################################
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# Clock groups - physically exclusive
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############################################################
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set_clock_groups -physically_exclusive -name phys_group1 \
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-group {clk1} \
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-group {clk1_2x}
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# Write SDC
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set sdc_file3 [make_result_file sdc_clk_grp_phys.sdc]
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write_sdc -no_timestamp $sdc_file3
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diff_files sdc_clk_grp_phys.sdcok $sdc_file3
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# Remove physically exclusive
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unset_clock_groups -physically_exclusive -name phys_group1
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############################################################
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# Multiple clock groups simultaneously
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############################################################
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set_clock_groups -asynchronous -name mixed1 \
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-group {clk1 gclk1} \
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-group {clk2 gclk2}
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set_clock_groups -logically_exclusive -name mixed2 \
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-group {vclk1} \
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-group {vclk2}
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# Write SDC with multiple groups
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set sdc_file4 [make_result_file sdc_clk_grp_multi.sdc]
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write_sdc -no_timestamp $sdc_file4
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diff_files sdc_clk_grp_multi.sdcok $sdc_file4
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report_checks
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# Remove all
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unset_clock_groups -asynchronous -name mixed1
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unset_clock_groups -logically_exclusive -name mixed2
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############################################################
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# Clock groups using -allow_paths
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############################################################
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set_clock_groups -asynchronous -name allow_grp \
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-group {clk1 clk1_2x gclk1} \
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-group {clk2 gclk2} \
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-allow_paths
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set sdc_file5 [make_result_file sdc_clk_grp_allow.sdc]
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write_sdc -no_timestamp $sdc_file5
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diff_files sdc_clk_grp_allow.sdcok $sdc_file5
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unset_clock_groups -asynchronous -name allow_grp
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############################################################
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# Clock sense
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############################################################
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# Positive sense
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set_sense -type clock -positive -clocks [get_clocks clk1] [get_pins buf1/Z]
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# Negative sense
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set_sense -type clock -negative -clocks [get_clocks clk2] [get_pins inv1/ZN]
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# Stop propagation
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set_sense -type clock -stop_propagation -clocks [get_clocks clk1] [get_pins and1/ZN]
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# Write SDC with clock sense
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set sdc_file6 [make_result_file sdc_clk_sense.sdc]
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write_sdc -no_timestamp $sdc_file6
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diff_files sdc_clk_sense.sdcok $sdc_file6
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report_checks
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############################################################
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# Clock groups without explicit name (auto-naming)
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############################################################
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set_clock_groups -asynchronous \
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-group {clk1 gclk1} \
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-group {clk2 gclk2}
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unset_clock_groups -asynchronous -all
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############################################################
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# Propagated clock on pins
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############################################################
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set_propagated_clock [get_clocks clk1]
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set_propagated_clock [get_clocks clk2]
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set_propagated_clock [get_pins reg1/CK]
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unset_propagated_clock [get_clocks clk1]
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unset_propagated_clock [get_pins reg1/CK]
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############################################################
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# Clock uncertainty on pins
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############################################################
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set_clock_uncertainty -setup 0.15 [get_pins reg1/CK]
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set_clock_uncertainty -hold 0.08 [get_pins reg1/CK]
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set_clock_uncertainty -setup 0.2 [get_pins reg2/CK]
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# Inter-clock uncertainty
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set_clock_uncertainty -from [get_clocks clk1] -to [get_clocks clk2] -setup 0.3
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set_clock_uncertainty -from [get_clocks clk1] -to [get_clocks clk2] -hold 0.15
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set_clock_uncertainty -from [get_clocks clk2] -to [get_clocks clk1] -setup 0.25
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set_clock_uncertainty -from [get_clocks clk2] -to [get_clocks clk1] -hold 0.12
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# Write SDC with all uncertainty
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set sdc_file7 [make_result_file sdc_clk_uncert.sdc]
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write_sdc -no_timestamp $sdc_file7
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diff_files_sorted sdc_clk_uncert.sdcok $sdc_file7
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# Remove inter-clock uncertainty
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unset_clock_uncertainty -from [get_clocks clk1] -to [get_clocks clk2] -setup
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unset_clock_uncertainty -from [get_clocks clk1] -to [get_clocks clk2] -hold
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# Remove pin uncertainty
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unset_clock_uncertainty -setup [get_pins reg1/CK]
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unset_clock_uncertainty -hold [get_pins reg1/CK]
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############################################################
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# Final write/verify
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############################################################
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set sdc_final [make_result_file sdc_clk_grp_final.sdc]
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write_sdc -no_timestamp $sdc_final
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diff_files sdc_clk_grp_final.sdcok $sdc_final
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report_checks
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