Files
OpenSTA/test/set_path_margin5.tcl
T
Akash LevyandCursor e9c075ab94 BIGFEATURE: Add set_path_margin command (#469)
* Implement set_path_margin command

Adds a new set_path_margin SDC command that applies a signed slack
adjustment to the capture-clock side of timing paths. A positive
margin tightens the path (harder to meet) and a negative margin
loosens it. Supports -setup/-hold/-from/-through/-to scoping,
priority/override semantics matching other exceptions, text and
JSON report output, and write_sdc serialisation.

Adapted from Silimate PR #57; uses upstream/master Mode/Scene and
string_view APIs. Test uses unset_path_exceptions in place of the
Silimate-only reset_path alias.

Co-authored-by: Cursor <[email protected]>

* Fix nested delaySum call indentation to match project style.

Co-authored-by: Cursor <[email protected]>

* Address review: store PathMargin on PathEnd, split tests

Keep the path margin exception on PathEndClkConstrained, add
PathEnd::hasPathMargin for report gating, and split the monolithic
regression into set_path_margin1–6. Rebased onto upstream/master and
document the command in ChangeLog.

Co-authored-by: Cursor <[email protected]>

* Document set_path_margin in OpenSTA.fodt/pdf

Add the command reference, index entry, and note that
unset_path_exceptions also clears path margin exceptions.

Co-authored-by: Cursor <[email protected]>

* Drop [[nodiscard]] from PathEnd::hasPathMargin.

Co-authored-by: Cursor <[email protected]>

---------

Co-authored-by: Cursor <[email protected]>
2026-08-09 09:29:03 -07:00

29 lines
1.0 KiB
Tcl

# set_path_margin -from clock
read_liberty ../examples/nangate45_typ.lib.gz
read_verilog ../examples/example1.v
link_design top
create_clock -name clk -period 10 {clk1 clk2 clk3}
set_input_delay -clock clk 0 {in1 in2}
proc setup_at { args } {
report_checks {*}$args -path_delay max -digits 4 -fields {} -group_path_count 1
}
proc report_json_path_margin { label path_delay args } {
set cmd [concat [list report_checks] $args \
[list -path_delay $path_delay -format json -group_path_count 1]]
with_output_to_variable json $cmd
if { [regexp {"path_margin": ([^,\n]+)} $json match margin] } {
puts "$label $margin"
} else {
puts "$label none"
}
}
set_path_margin -setup 4.0 -from [get_clocks clk]
# Should see path margin on the clock.
setup_at -from [get_pins r1/CK] -to [get_pins r3/D]
report_json_path_margin setup_from_clk_r1 max -from [get_pins r1/CK] -to [get_pins r3/D]
setup_at -from [get_pins r2/CK] -to [get_pins r3/D]
report_json_path_margin setup_from_clk_r2 max -from [get_pins r2/CK] -to [get_pins r3/D]