219 lines
6.3 KiB
Tcl
219 lines
6.3 KiB
Tcl
# Test Report.cc string output, log file, and buffer growth paths.
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source ../../test/helpers.tcl
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#---------------------------------------------------------------
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# Test 1: Log file with extensive output to trigger buffer growth
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# Exercises: logBegin, logEnd, printToBufferAppend buffer growth
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#---------------------------------------------------------------
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puts "--- Test 1: log file with large output ---"
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set log1 [make_result_file "util_log_large.txt"]
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log_begin $log1
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# Generate lots of output to exercise buffer
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read_liberty ../../test/nangate45/Nangate45_typ.lib
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read_verilog ../../examples/example1.v
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link_design top
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create_clock -name clk -period 10 {clk1 clk2 clk3}
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set_input_delay -clock clk 0 {in1 in2}
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set_output_delay -clock clk 0 [get_ports out]
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set_input_transition 0.1 {in1 in2 clk1 clk2 clk3}
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# Generate many timing reports (exercises printToBuffer extensively)
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report_checks
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report_checks -path_delay min
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report_checks -fields {slew cap input_pins fanout}
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report_checks -format full_clock_expanded
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report_checks -format full_clock
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report_checks -sort_by_slack
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report_checks -group_path_count 10
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# Unit reports
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report_units
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set_cmd_units -time ps -capacitance fF
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report_units
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set_cmd_units -time ns -capacitance pF
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report_units
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set_cmd_units -time ns -capacitance pF -resistance kOhm -voltage V -current mA
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report_units
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log_end
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# Verify log file was created and has content
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if { [file exists $log1] } {
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diff_files util_log_large.txtok $log1
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} else {
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puts "INFO: log file not created"
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}
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#---------------------------------------------------------------
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# Test 2: Log + redirect simultaneously
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# Exercises: printString dual output path (redirect + log)
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#---------------------------------------------------------------
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puts "--- Test 2: log + redirect simultaneous ---"
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set log2 [make_result_file "util_log_simul.txt"]
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set redir2 [make_result_file "util_redir_simul.txt"]
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log_begin $log2
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sta::redirect_file_begin $redir2
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# All output goes to both log and redirect
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report_checks
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report_checks -path_delay min
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report_checks -fields {slew cap}
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report_units
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sta::redirect_file_end
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log_end
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if { [file exists $log2] && [file exists $redir2] } {
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diff_files util_log_simul.txtok $log2
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diff_files util_redir_simul.txtok $redir2
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}
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#---------------------------------------------------------------
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# Test 3: Redirect string with large content
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# Exercises: redirectStringBegin/End/Print, redirect_to_string_ path
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#---------------------------------------------------------------
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puts "--- Test 3: redirect string ---"
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sta::redirect_string_begin
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report_checks
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report_checks -path_delay min
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report_units
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set str1 [sta::redirect_string_end]
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puts "redirect string length: [string length $str1]"
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# Multiple redirect string cycles
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for {set i 0} {$i < 5} {incr i} {
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sta::redirect_string_begin
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report_units
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set s [sta::redirect_string_end]
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puts "cycle $i string length: [string length $s]"
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}
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#---------------------------------------------------------------
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# Test 4: with_output_to_variable (exercises string redirect)
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#---------------------------------------------------------------
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puts "--- Test 4: with_output_to_variable ---"
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with_output_to_variable v1 { report_checks }
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with_output_to_variable v2 { report_checks -path_delay min }
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with_output_to_variable v3 { report_units }
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with_output_to_variable v4 {
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report_checks
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report_checks -path_delay min
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report_units
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}
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puts "v1 length: [string length $v1]"
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puts "v2 length: [string length $v2]"
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puts "v3 length: [string length $v3]"
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puts "v4 length: [string length $v4]"
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#---------------------------------------------------------------
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# Test 5: Redirect file append
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# Exercises: redirectFileAppendBegin
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#---------------------------------------------------------------
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puts "--- Test 5: redirect file append ---"
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set app_file [make_result_file "util_append.txt"]
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# First write
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sta::redirect_file_begin $app_file
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report_units
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sta::redirect_file_end
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# Append
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sta::redirect_file_append_begin $app_file
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report_checks
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sta::redirect_file_end
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diff_files util_append.txtok $app_file
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#---------------------------------------------------------------
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# Test 6: Error handling paths
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# Exercises: error, fileError (via bad file reads)
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#---------------------------------------------------------------
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puts "--- Test 6: error paths ---"
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foreach path {/nonexistent/path/xyz.lib /nonexistent/dir/xyz.v} {
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if {[file exists $path]} {
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error "unexpected existing path $path"
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}
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}
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set bad_v util_report_string_log_bad_verilog.v
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read_verilog $bad_v
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link_design bad_design
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puts "bad verilog loaded from static fixture: $bad_v"
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#---------------------------------------------------------------
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# Test 7: Message suppression/unsuppression
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# Exercises: suppressMsgId, unsuppressMsgId, isSuppressed
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#---------------------------------------------------------------
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puts "--- Test 7: message suppression ---"
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# Suppress a range of message IDs
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for {set id 100} {$id < 120} {incr id} {
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suppress_msg $id
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}
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# Unsuppress them
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for {set id 100} {$id < 120} {incr id} {
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unsuppress_msg $id
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}
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# Suppress specific warnings
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suppress_msg 1640 1641 1642 1643 1644 1645
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unsuppress_msg 1640 1641 1642 1643 1644 1645
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#---------------------------------------------------------------
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# Test 8: Debug level setting
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# Exercises: Debug.cc set/check paths
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#---------------------------------------------------------------
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puts "--- Test 8: debug levels ---"
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foreach tag {search graph delay_calc parasitic_reduce verilog} {
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sta::set_debug $tag 1
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sta::set_debug $tag 0
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}
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# Higher debug levels
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sta::set_debug "search" 3
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sta::set_debug "search" 0
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sta::set_debug "graph" 3
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sta::set_debug "graph" 0
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#---------------------------------------------------------------
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# Test 9: Format functions
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# Exercises: format_time, format_capacitance, format_resistance, etc.
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#---------------------------------------------------------------
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puts "--- Test 9: format functions ---"
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# Time formatting
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foreach t {1e-9 1e-10 1e-11 1e-12 5.5e-9 0.0} {
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set ft [sta::format_time $t 4]
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puts "format_time($t) = $ft"
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}
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# Capacitance formatting
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foreach c {1e-12 1e-13 1e-14 1e-15 5.5e-12 0.0} {
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set fc [sta::format_capacitance $c 4]
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puts "format_capacitance($c) = $fc"
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}
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# Resistance formatting
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foreach r {100 1000 10000 0.1 0.0} {
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set fr [sta::format_resistance $r 4]
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puts "format_resistance($r) = $fr"
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}
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# Power formatting
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foreach p {1e-3 1e-6 1e-9 5.5e-3 0.0} {
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set fp [sta::format_power $p 4]
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puts "format_power($p) = $fp"
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}
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