161 lines
5.6 KiB
Tcl
161 lines
5.6 KiB
Tcl
# Test complex exception thru matching with nets, instances, pins
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# and the ExceptionThru state machine for multi-through points.
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# Targets:
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# ExceptionPath.cc: ExceptionThru::matches with nets/instances/pins,
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# ExceptionThru::intersectsPts with mixed object types,
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# ExceptionThru::equal, ExceptionThru::compare,
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# ExceptionThru::findHash with all object types,
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# ExceptionThru::allPins (net expansion to pins),
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# ExceptionTo::matches (with pin/clk/inst matching branches),
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# ExceptionTo::matchesFilter (report filter path),
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# ExceptionFrom::intersectsPts (pin/clk/inst branches),
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# ExceptionPath::intersectsPts,
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# ExceptionPath::mergeable (complex merge decisions),
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# fromThruToPriority calculation for various combos,
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# ExceptionPathLess comparison for sorting
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# Sdc.cc: makeExceptionThru with nets/instances/pins,
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# addException (merge logic), resetPath,
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# makeExceptionFrom with mixed pins/clocks/instances,
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# makeExceptionTo with mixed pins/clocks/instances
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# WriteSdc.cc: writeExceptionThru with nets/instances/pins,
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# writeExceptionFromTo with multi-object lists
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source ../../test/helpers.tcl
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read_liberty ../../test/nangate45/Nangate45_typ.lib
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read_verilog sdc_test2.v
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link_design sdc_test2
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create_clock -name clk1 -period 10 [get_ports clk1]
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create_clock -name clk2 -period 20 [get_ports clk2]
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set_input_delay -clock clk1 2.0 [get_ports in1]
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set_input_delay -clock clk1 2.0 [get_ports in2]
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set_input_delay -clock clk2 2.0 [get_ports in3]
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set_output_delay -clock clk1 3.0 [get_ports out1]
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set_output_delay -clock clk2 3.0 [get_ports out2]
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# Test 1: Through nets (exercises ExceptionThru with nets)
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set_false_path -through [get_nets n1] -to [get_ports out1]
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set_false_path -through [get_nets n2] -to [get_ports out2]
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set_false_path -from [get_ports in1] -through [get_nets n3] -to [get_ports out1]
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# Through net with rise_through
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set_false_path -rise_through [get_nets n4] -to [get_ports out2]
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# Through net with fall_through
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set_false_path -fall_through [get_nets n5] -to [get_ports out1]
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# Test 2: Through instances (exercises ExceptionThru with instances)
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set_false_path -through [get_cells buf1] -to [get_ports out2]
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set_false_path -from [get_ports in2] -through [get_cells and1] -to [get_ports out1]
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# Rise through instance
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set_false_path -from [get_ports in3] -rise_through [get_cells or1] -to [get_ports out2]
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# Test 3: Multiple through points with mixed types
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# (net then pin, instance then pin, pin then net)
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# Net then pin
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set_false_path -from [get_ports in1] \
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-through [get_nets n1] \
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-through [get_pins and1/ZN] \
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-to [get_ports out1]
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# Instance then pin
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set_false_path -from [get_ports in2] \
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-through [get_cells inv1] \
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-through [get_pins nand1/ZN] \
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-to [get_ports out1]
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# Pin then net
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set_false_path -from [get_ports in1] \
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-through [get_pins buf1/Z] \
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-through [get_nets n3] \
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-to [get_ports out1]
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# Three through points: pin, net, instance
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set_false_path -from [get_ports in2] \
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-through [get_pins inv1/ZN] \
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-through [get_nets n3] \
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-through [get_cells nand1] \
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-to [get_ports out1]
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# Test 4: From with mixed objects (pins + clocks)
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set_false_path -from [list [get_ports in1] [get_ports in2]] \
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-to [list [get_ports out1] [get_ports out2]]
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set_false_path -from [list [get_clocks clk1] [get_ports in3]] \
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-to [get_ports out1]
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# From with instances
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set_false_path -from [get_cells reg1] -to [get_ports out2]
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# To with instances
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set_false_path -from [get_ports in1] -to [get_cells reg2]
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# Test 5: Max/min delay with through
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set_max_delay -from [get_ports in1] -through [get_nets n1] -to [get_ports out1] 7.0
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set_max_delay -from [get_ports in2] -through [get_cells and1] -to [get_ports out1] 6.5
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set_max_delay -from [get_ports in3] \
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-through [get_pins or1/ZN] \
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-to [get_ports out2] 8.0
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set_min_delay -from [get_ports in1] -through [get_nets n1] -to [get_ports out1] 0.5
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# Max delay with -ignore_clock_latency
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set_max_delay -from [get_ports in3] -to [get_ports out2] -ignore_clock_latency 9.0
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# Test 6: Multicycle with through
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set_multicycle_path -setup 2 -from [get_ports in1] \
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-through [get_pins buf1/Z] \
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-to [get_ports out1]
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set_multicycle_path -hold 1 -from [get_ports in1] \
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-through [get_pins buf1/Z] \
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-to [get_ports out1]
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# Test 7: Group path with through nets/instances
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group_path -name gp_net -from [get_ports in1] \
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-through [get_nets n1] \
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-to [get_ports out1]
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group_path -name gp_inst -from [get_ports in2] \
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-through [get_cells and1] \
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-to [get_ports out1]
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group_path -name gp_pin -from [get_ports in3] \
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-through [get_pins or1/ZN] \
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-to [get_ports out2]
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group_path -default -from [get_ports in1] -to [get_ports out2]
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# Write SDC
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set sdc1 [make_result_file sdc_exc_thru_complex1.sdc]
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write_sdc -no_timestamp $sdc1
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diff_files sdc_exc_thru_complex1.sdcok $sdc1
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set sdc2 [make_result_file sdc_exc_thru_complex2.sdc]
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write_sdc -no_timestamp -compatible $sdc2
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diff_files sdc_exc_thru_complex2.sdcok $sdc2
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set sdc3 [make_result_file sdc_exc_thru_complex3.sdc]
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write_sdc -no_timestamp -digits 6 $sdc3
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diff_files sdc_exc_thru_complex3.sdcok $sdc3
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# Unset and verify
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unset_path_exceptions -through [get_nets n1] -to [get_ports out1]
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unset_path_exceptions -through [get_nets n2] -to [get_ports out2]
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unset_path_exceptions -from [get_ports in1] -through [get_nets n3] -to [get_ports out1]
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unset_path_exceptions -through [get_cells buf1] -to [get_ports out2]
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unset_path_exceptions -from [get_ports in2] -through [get_cells and1] -to [get_ports out1]
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# Write after unset to verify reduced constraints
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set sdc_unset [make_result_file sdc_exc_thru_complex_unset.sdc]
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write_sdc -no_timestamp $sdc_unset
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diff_files sdc_exc_thru_complex_unset.sdcok $sdc_unset
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