104 lines
2.9 KiB
C++
104 lines
2.9 KiB
C++
// OpenSTA, Static Timing Analyzer
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// Copyright (c) 2020, Parallax Software, Inc.
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <https://www.gnu.org/licenses/>.
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#pragma once
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#include "Map.hh"
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#include "Set.hh"
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#include "Vector.hh"
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#include "LibertyClass.hh"
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#include "NetworkClass.hh"
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#include "MinMaxValues.hh"
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#include "PinPair.hh"
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namespace sta {
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class Sdc;
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class Clock;
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class ClockEdge;
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class CycleAccting;
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class CycleAcctingLess;
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class InputDelay;
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class OutputDelay;
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class FalsePath;
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class PathDelay;
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class MultiCyclePath;
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class FilterPath;
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class GroupPath;
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class ExceptionFromTo;
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class ExceptionFrom;
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class ExceptionThru;
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class ExceptionTo;
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class ExceptionPt;
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class InputDrive;
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class MinMax;
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class MinMaxAll;
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class RiseFallMinMax;
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class DisabledInstancePorts;
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class DisabledCellPorts;
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class ExceptionPath;
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class DataCheck;
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class Wireload;
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class ClockLatency;
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class ClockInsertion;
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class ClockGroup;
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class ClockGroups;
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enum class AnalysisType { single, bc_wc, ocv };
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enum class ExceptionPathType { false_path, loop, multi_cycle, path_delay,
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group_path, filter, any};
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enum class ClockSense { positive, negative, stop };
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typedef std::pair<const Clock*, const Clock*> ClockPair;
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typedef Vector<float> FloatSeq;
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typedef Vector<int> IntSeq;
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typedef Vector<Clock*> ClockSeq;
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typedef Set<Clock*> ClockSet;
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typedef Vector<PinSet*> PinSetSeq;
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typedef MinMax SetupHold;
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typedef MinMaxAll SetupHoldAll;
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typedef Vector<ExceptionThru*> ExceptionThruSeq;
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typedef Set<LibertyPortPair*, LibertyPortPairLess> LibertyPortPairSet;
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typedef Map<Instance*, DisabledInstancePorts*> DisabledInstancePortsMap;
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typedef Map<LibertyCell*, DisabledCellPorts*> DisabledCellPortsMap;
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typedef MinMaxValues<float> ClockUncertainties;
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typedef Set<ExceptionPath*> ExceptionPathSet;
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typedef PinPair EdgePins;
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typedef PinPairSet EdgePinsSet;
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typedef Map<const Pin*, LogicValue> LogicValueMap;
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typedef Set<ClockGroup*> ClockGroupSet;
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// For Search.
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class ExceptionState;
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class ExceptionPath;
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typedef Set<ExceptionState*> ExceptionStateSet;
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enum class CrprMode { same_pin, same_transition };
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// Constraint applies to clock or data paths.
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enum class PathClkOrData { clk, data };
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const int path_clk_or_data_count = 2;
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enum class TimingDerateType { cell_delay, cell_check, net_delay };
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const int timing_derate_type_count = int(TimingDerateType::net_delay) + 1 ;
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const int timing_derate_cell_type_count = 2;
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} // namespace
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