27 lines
728 B
Tcl
27 lines
728 B
Tcl
# get_* with no arguments
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# Read in design and libraries
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read_liberty asap7_small.lib.gz
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read_verilog reg1_asap7.v
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link_design top
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create_clock -name clk -period 500 {clk1 clk2 clk3}
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create_clock -name vclk -period 1000
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# Test each SDC get_* command with no arguments
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puts {[get_cells]}
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report_object_full_names [get_cells]
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puts {[get_clocks]}
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report_object_full_names [get_clocks]
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puts {[get_lib_cells]}
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report_object_full_names [get_lib_cells]
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puts {[get_lib_pins]}
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report_object_full_names [get_lib_pins]
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puts {[get_libs]}
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report_object_full_names [get_libs]
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puts {[get_nets]}
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report_object_full_names [get_nets]
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puts {[get_pins]}
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report_object_full_names [get_pins]
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puts {[get_ports]}
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report_object_full_names [get_ports]
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