241 lines
8.1 KiB
C++
241 lines
8.1 KiB
C++
// OpenSTA, Static Timing Analyzer
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// Copyright (c) 2025, Parallax Software, Inc.
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <https://www.gnu.org/licenses/>.
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//
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// The origin of this software must not be misrepresented; you must not
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// claim that you wrote the original software.
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//
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// Altered source versions must be plainly marked as such, and must not be
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// misrepresented as being the original software.
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//
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// This notice may not be removed or altered from any source distribution.
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#include "DelayCalcBase.hh"
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#include "Liberty.hh"
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#include "TimingArc.hh"
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#include "TimingModel.hh"
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#include "TableModel.hh"
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#include "Network.hh"
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#include "Parasitics.hh"
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#include "Graph.hh"
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#include "Sdc.hh"
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#include "Corner.hh"
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#include "DcalcAnalysisPt.hh"
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#include "GraphDelayCalc.hh"
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#include "Variables.hh"
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namespace sta {
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using std::string;
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using std::log;
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DelayCalcBase::DelayCalcBase(StaState *sta) :
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ArcDelayCalc(sta)
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{
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}
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void
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DelayCalcBase::reduceParasitic(const Parasitic *parasitic_network,
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const Net *net,
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const Corner *corner,
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const MinMaxAll *min_max)
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{
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NetConnectedPinIterator *pin_iter = network_->connectedPinIterator(net);
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while (pin_iter->hasNext()) {
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const Pin *pin = pin_iter->next();
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if (network_->isDriver(pin)) {
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for (const RiseFall *rf : RiseFall::range()) {
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for (const MinMax *min_max : min_max->range()) {
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if (corner == nullptr) {
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for (const Corner *corner1 : *corners_) {
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DcalcAnalysisPt *dcalc_ap = corner1->findDcalcAnalysisPt(min_max);
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reduceParasitic(parasitic_network, pin, rf, dcalc_ap);
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}
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}
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else {
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DcalcAnalysisPt *dcalc_ap = corner->findDcalcAnalysisPt(min_max);
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reduceParasitic(parasitic_network, pin, rf, dcalc_ap);
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}
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}
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}
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}
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}
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delete pin_iter;
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}
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void
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DelayCalcBase::finishDrvrPin()
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{
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}
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// For DSPF on an input port the elmore delay is used as the time
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// constant of an exponential waveform. The delay to the logic
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// threshold and slew are computed for the exponential waveform.
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// Note that this uses the driver thresholds and relies on
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// thresholdAdjust to convert the delay and slew to the load's thresholds.
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void
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DelayCalcBase::dspfWireDelaySlew(const Pin *load_pin,
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const RiseFall *rf,
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Slew drvr_slew,
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float elmore,
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ArcDelay &wire_delay,
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Slew &load_slew)
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{
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LibertyLibrary *load_library = thresholdLibrary(load_pin);
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float vth = 0.5;
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float vl = 0.2;
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float vh = 0.8;
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float slew_derate = 1.0;
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if (load_library) {
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vth = load_library->inputThreshold(rf);
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vl = load_library->slewLowerThreshold(rf);
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vh = load_library->slewUpperThreshold(rf);
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slew_derate = load_library->slewDerateFromLibrary();
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}
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wire_delay = -elmore * log(1.0 - vth);
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load_slew = drvr_slew + elmore * log((1.0 - vl) / (1.0 - vh)) / slew_derate;
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load_slew = drvr_slew + elmore * log((1.0 - vl) / (1.0 - vh)) / slew_derate;
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}
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void
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DelayCalcBase::thresholdAdjust(const Pin *load_pin,
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const LibertyLibrary *drvr_library,
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const RiseFall *rf,
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ArcDelay &load_delay,
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Slew &load_slew)
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{
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LibertyLibrary *load_library = thresholdLibrary(load_pin);
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if (load_library
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&& drvr_library
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&& load_library != drvr_library) {
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float drvr_vth = drvr_library->outputThreshold(rf);
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float load_vth = load_library->inputThreshold(rf);
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float drvr_slew_delta = drvr_library->slewUpperThreshold(rf)
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- drvr_library->slewLowerThreshold(rf);
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float load_delay_delta =
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delayAsFloat(load_slew) * ((load_vth - drvr_vth) / drvr_slew_delta);
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load_delay += (rf == RiseFall::rise())
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? load_delay_delta
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: -load_delay_delta;
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float load_slew_delta = load_library->slewUpperThreshold(rf)
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- load_library->slewLowerThreshold(rf);
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float drvr_slew_derate = drvr_library->slewDerateFromLibrary();
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float load_slew_derate = load_library->slewDerateFromLibrary();
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load_slew = load_slew * ((load_slew_delta / load_slew_derate)
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/ (drvr_slew_delta / drvr_slew_derate));
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}
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}
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LibertyLibrary *
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DelayCalcBase::thresholdLibrary(const Pin *load_pin)
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{
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if (network_->isTopLevelPort(load_pin))
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// Input/output slews use the default (first read) library
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// for slew thresholds.
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return network_->defaultLibertyLibrary();
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else {
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LibertyPort *lib_port = network_->libertyPort(load_pin);
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if (lib_port)
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return lib_port->libertyCell()->libertyLibrary();
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else
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return network_->defaultLibertyLibrary();
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}
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}
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ArcDelay
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DelayCalcBase::checkDelay(const Pin *check_pin,
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const TimingArc *arc,
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const Slew &from_slew,
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const Slew &to_slew,
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float related_out_cap,
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const DcalcAnalysisPt *dcalc_ap)
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{
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CheckTimingModel *model = arc->checkModel(dcalc_ap);
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if (model) {
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float from_slew1 = delayAsFloat(from_slew);
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float to_slew1 = delayAsFloat(to_slew);
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return model->checkDelay(pinPvt(check_pin, dcalc_ap), from_slew1, to_slew1,
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related_out_cap,
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variables_->pocvEnabled());
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}
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else
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return delay_zero;
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}
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string
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DelayCalcBase::reportCheckDelay(const Pin *check_pin,
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const TimingArc *arc,
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const Slew &from_slew,
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const char *from_slew_annotation,
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const Slew &to_slew,
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float related_out_cap,
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const DcalcAnalysisPt *dcalc_ap,
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int digits)
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{
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CheckTimingModel *model = arc->checkModel(dcalc_ap);
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if (model) {
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float from_slew1 = delayAsFloat(from_slew);
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float to_slew1 = delayAsFloat(to_slew);
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return model->reportCheckDelay(pinPvt(check_pin, dcalc_ap), from_slew1,
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from_slew_annotation, to_slew1,
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related_out_cap, false, digits);
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}
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return "";
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}
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const Pvt *
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DelayCalcBase::pinPvt(const Pin *pin,
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const DcalcAnalysisPt *dcalc_ap)
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{
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const Instance *drvr_inst = network_->instance(pin);
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const Pvt *pvt = sdc_->pvt(drvr_inst, dcalc_ap->constraintMinMax());
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if (pvt == nullptr)
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pvt = dcalc_ap->operatingConditions();
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return pvt;
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}
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void
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DelayCalcBase::setDcalcArgParasiticSlew(ArcDcalcArg &gate,
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const DcalcAnalysisPt *dcalc_ap)
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{
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const Pin *drvr_pin = gate.drvrPin();
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if (drvr_pin) {
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const Parasitic *parasitic;
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float load_cap;
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graph_delay_calc_->parasiticLoad(drvr_pin, gate.drvrEdge(), dcalc_ap,
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nullptr, this, load_cap,
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parasitic);
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gate.setLoadCap(load_cap);
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gate.setParasitic(parasitic);
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const Pin *in_pin = gate.inPin();
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const Vertex *in_vertex = graph_->pinLoadVertex(in_pin);
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const Slew &in_slew = graph_delay_calc_->edgeFromSlew(in_vertex, gate.inEdge(),
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gate.edge(), dcalc_ap);
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gate.setInSlew(in_slew);
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}
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}
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void
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DelayCalcBase::setDcalcArgParasiticSlew(ArcDcalcArgSeq &gates,
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const DcalcAnalysisPt *dcalc_ap)
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{
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for (ArcDcalcArg &gate : gates)
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setDcalcArgParasiticSlew(gate, dcalc_ap);
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}
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} // namespace
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