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Author SHA1 Message Date
Matt Liberty 8e42af1759
Merge pull request #349 from The-OpenROAD-Project-staging/sta_latest_from_parallaxsw_tidy_0416
Sta latest from parallaxsw tidy 0416
2026-04-20 20:14:44 +00:00
dsengupta0628 08265dc2bf Merge branch 'master' into sta_latest_from_parallaxsw_tidy_0416 2026-04-20 16:56:24 +00:00
dsengupta0628 4b6a7653a9 updated BUILD for successful Bazel after util/Machine.cc was removed that controlled dispatch
Signed-off-by: dsengupta0628 <dsengupta@precisioninno.com>
2026-04-20 16:55:43 +00:00
Matt Liberty 4527254dd3
Merge pull request #348 from The-OpenROAD-Project-staging/sta_latest_from_parallaxsw_tidy_0416
Sta latest from parallaxsw tidy 0416
2026-04-20 15:56:31 +00:00
dsengupta0628 7fe56ccc08 update tests golden outputs and one cpp file to accomodate new changes in upstream OSTA. functionality remains the same
Signed-off-by: dsengupta0628 <dsengupta@precisioninno.com>
2026-04-20 15:05:37 +00:00
dsengupta0628 c2b629d751 test codes updated to compile succesfully with new changes in upstream
Signed-off-by: dsengupta0628 <dsengupta@precisioninno.com>
2026-04-20 14:47:52 +00:00
dsengupta0628 05b4e3a1d9 Latest pulled in changes on 4/20 from upstream to push all together with latest from 4/16
Signed-off-by: dsengupta0628 <dsengupta@precisioninno.com>
2026-04-20 14:21:16 +00:00
dsengupta0628 f6a1fdbaff Replaced EXPECT_NE(x.typeString(), nullptr) with EXPECT_FALSE(x.typeString().empty()) for all 6 *TypeString tests as upstream changed typeString() return type from const char* to std::string_view
Signed-off-by: dsengupta0628 <dsengupta@precisioninno.com>
2026-04-20 13:49:09 +00:00
dsengupta0628 63fb0e0550 Merge branch 'master' into sta_latest_from_parallaxsw_tidy_0416 2026-04-20 13:36:22 +00:00
dsengupta0628 133e2d6f99 update tests to compile okay with new upstream codes
Signed-off-by: dsengupta0628 <dsengupta@precisioninno.com>
2026-04-20 13:35:44 +00:00
James Cherry 6c9af4a5fa LibertyPort::less
Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-04-18 11:39:03 -07:00
James Cherry 668cfb26af makeSceneMap rm dup warnings
Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-04-18 08:45:04 -07:00
James Cherry 48febcf785 stringFloat
Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-04-17 13:53:01 -07:00
James Cherry 53a1552ab0 timing_arc full_name
Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-04-17 13:52:44 -07:00
James Cherry 7838986dc4 Clock embed sequence members
Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-04-16 18:42:26 -07:00
James Cherry e629909aaf report_check_types $422
Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-04-16 16:37:36 -07:00
James Cherry 6bcf7b8156 rm unnecessary sta:: in tcl
Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-04-16 16:12:59 -07:00
James Cherry 6e7ec45bc8 rm extra swig module dcls
Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-04-16 15:46:32 -07:00
James Cherry 12c59878ee prima non-ccs report dcalc resolves #418
Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-04-16 15:13:28 -07:00
dsengupta0628 c523516092 reapply the changes from 2a559212 for reading weird DEFs
Signed-off-by: dsengupta0628 <dsengupta@precisioninno.com>
2026-04-16 22:00:48 +00:00
dsengupta0628 9fbfcc4fcb picked changes from upstream master, resolved conflict for levelized driververtices, parseBus for weird defs
Signed-off-by: dsengupta0628 <dsengupta@precisioninno.com>
2026-04-16 21:37:37 +00:00
James Cherry 49d0ba2cfc github workflow retention
Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-04-16 09:59:29 -07:00
James Cherry b20a9384ef Machine.cc
Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-04-15 19:23:39 -07:00
James Cherry 134cf2cab7 tidy
Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-04-15 18:21:47 -07:00
James Cherry 21848bcdd2 clang tidy
Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-04-15 09:38:10 -07:00
James Cherry 63efee64bf tidy round1 2026-04-13 14:59:05 -07:00
393 changed files with 4977 additions and 6107 deletions

80
.clang-tidy Normal file
View File

@ -0,0 +1,80 @@
Checks: >
clang-diagnostic-*,
clang-analyzer-*,
-clang-analyzer-core.NonNullParamChecker,
-clang-analyzer-core.CallAndMessage,
-clang-analyzer-core.uninitialized.UndefReturn,
-clang-analyzer-cplusplus.NewDeleteLeaks,
-clang-analyzer-optin.performance.Padding,
readability-*,
-readability-identifier-naming,
-readability-braces-around-statements,
-readability-convert-member-functions-to-static,
-readability-else-after-return,
-readability-function-cognitive-complexity,
-readability-inconsistent-ifelse-braces,
-readability-identifier-length,
-readability-implicit-bool-conversion,
-readability-isolate-declaration,
-readability-magic-numbers,
-readability-make-member-function-const,
-readability-math-missing-parentheses,
-readability-named-parameter,
-readability-qualified-auto,
-readability-redundant-access-specifiers,
-readability-simplify-boolean-expr,
-readability-static-definition-in-anonymous-namespace,
-readability-suspicious-call-argument,
-readability-uppercase-literal-suffix,
-readability-use-anyofallof,
google-*,
-google-readability-avoid-underscore-in-googletest-name,
-google-readability-braces-around-statements,
-google-readability-casting,
-google-readability-todo,
-google-runtime-references,
-google-explicit-constructor,
performance-*,
-performance-enum-size,
bugprone-*,
-bugprone-branch-clone,
-bugprone-easily-swappable-parameters,
-bugprone-exception-escape,
-bugprone-macro-parentheses,
-bugprone-move-forwarding-reference,
-bugprone-narrowing-conversions,
-bugprone-suspicious-missing-comma,
-bugprone-throwing-static-initialization,
modernize-*,
-modernize-avoid-bind,
-modernize-avoid-c-arrays,
-modernize-concat-nested-namespaces,
-modernize-macro-to-enum,
-modernize-pass-by-value,
-modernize-raw-string-literal,
-modernize-return-braced-init-list,
-modernize-use-auto,
-modernize-use-nodiscard,
-modernize-use-trailing-return-type,
-modernize-use-transparent-functors,
misc-*,
-misc-const-correctness,
-misc-multiple-inheritance,
-misc-no-recursion,
-misc-non-private-member-variables-in-classes,
-misc-redundant-expression,
-misc-unused-parameters,
-misc-use-anonymous-namespace,
-misc-use-internal-linkage,
-misc-include-cleaner
# Only report diagnostics in headers under this tree (app/, include/sta/, build-generated
# headers, etc.).
# Excludes system and third-party paths such as /opt/local/include.
HeaderFilterRegex: '.*/(app|cmake|dcalc|graph|liberty|network|parasitics|power|sdc|sdf|search|spice|tcl|util|verilog|include/sta|build/include/sta)/.*'
# util/gzstream.hh
# util/FlexDisableRegister.hh
# Bison-generated parser headers (build/{Liberty,Verilog,...}Parse.hh)
ExcludeHeaderFilterRegex: '(.*/)?(gzstream\.hh|FlexDisableRegister\.hh|(Liberty|Verilog|Sdf|Spef|Saif|LibExpr)Parse\.hh)$'
FormatStyle: none

View File

@ -31,3 +31,29 @@ alwaysApply: false
- C++ source: `.cc`
- C++ headers: `.hh`
## Include order
Sort `#include` lines **lexicographically by the path inside** `<>`
or `""` (case-sensitive). Separate **groups** with a single blank line.
### Translation units (`*.cc`)
1. **Primary header(s)** for this file only:
- `#include "Stem.hh"` where `Stem` matches the basename of the `.cc` file (e.g. `Foo.cc` → `Foo.hh`).
- If the file uses a paired private header, include `#include "StemPvt.hh"` **immediately after** `Stem.hh` (e.g. `MakeTimingModel.cc` → `MakeTimingModel.hh` then `MakeTimingModelPvt.hh`).
- Do **not** pull in other headers just because their names share a prefix with `Stem` (e.g. `SearchClass.hh` is not a “primary” include for `Search.cc`; it belongs in the project group below).
2. **System / standard library** headers: `#include <...>` lines, sorted alphabetically.
3. **All other project** headers: `#include "..."` lines, sorted alphabetically (including `search/Crpr.hh`-style paths and includes from `liberty/`, etc.).
If a **comment or special block** intentionally splits the include list (e.g. a third-party note before `#include "cudd.h"`), keep that structure; sort only within each contiguous run of `#include` lines unless merging groups is clearly safe.
### Headers (`*.hh`)
After `#pragma once` (and the files license block, if present):
1. **System** `#include <...>` lines, sorted alphabetically.
2. **Project** `#include "..."` lines, sorted alphabetically.

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@ -54,6 +54,7 @@ jobs:
name: artifact
path: |
build/install/*
retention-days: 1
- name: Upload Test Result
uses: actions/upload-artifact@v7

18
BUILD
View File

@ -339,15 +339,13 @@ cc_library(
],
) + [
"app/StaMain.cc",
"util/Machine.cc",
":StaConfig",
],
#+ select({
# "@bazel_tools//src/conditions:windows": ["util/MachineWin32.cc"],
# "@bazel_tools//src/conditions:darwin": ["util/MachineApple.cc"],
# "@bazel_tools//src/conditions:linux": ["util/MachineLinux.cc"],
# "//conditions:default": ["util/MachineUnknown.cc"],
# })
] + select({
"@platforms//os:osx": ["util/MachineApple.cc"],
"@platforms//os:linux": ["util/MachineLinux.cc"],
"@platforms//os:windows": ["util/MachineWin32.cc"],
"//conditions:default": ["util/MachineUnknown.cc"],
}),
hdrs = glob(
include = ["include/sta/*.hh"],
) + [
@ -393,10 +391,6 @@ cc_library(
"util",
"verilog",
],
textual_hdrs = select({
"@platforms//os:osx": ["util/MachineApple.cc"],
"//conditions:default": ["util/MachineLinux.cc"],
}),
visibility = ["//:__subpackages__"],
deps = [
"@cudd",

View File

@ -1,5 +1,5 @@
# OpenSTA, Static Timing Analyzer
# Copyright (c) 2025, Parallax Software, Inc.
# Copyright (c) 2026, Parallax Software, Inc.
#
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
@ -222,7 +222,6 @@ set(STA_SOURCE
util/Error.cc
util/Fuzzy.cc
util/Hash.cc
util/Machine.cc
util/MinMax.cc
util/PatternMatch.cc
util/Report.cc
@ -239,6 +238,16 @@ set(STA_SOURCE
verilog/VerilogWriter.cc
)
if(APPLE)
list(APPEND STA_SOURCE util/MachineApple.cc)
elseif(CMAKE_SYSTEM_NAME STREQUAL "Linux")
list(APPEND STA_SOURCE util/MachineLinux.cc)
elseif(WIN32)
list(APPEND STA_SOURCE util/MachineWin32.cc)
else()
list(APPEND STA_SOURCE util/MachineUnknown.cc)
endif()
# Source files.
set(STA_TCL_FILES
tcl/Init.tcl

View File

@ -148,4 +148,4 @@ unencode(const char *inits[])
return unencoded;
}
} // namespace
} // namespace sta

View File

@ -23,6 +23,7 @@
# searching OSX system directories before unix directories.
set(TCL_POSSIBLE_NAMES
#tcl90 tcl9.0
tcl87 tcl8.7
tcl86 tcl8.6
tcl85 tcl8.5
@ -32,6 +33,7 @@ set(TCL_POSSIBLE_NAMES
if (NOT TCL_LIB_PATHS)
if (CMAKE_SYSTEM_NAME STREQUAL "Darwin")
set(TCL_LIB_PATHS
#/opt/homebrew/Cellar/tcl-tk/9.0.3/lib
/opt/homebrew/Cellar/tcl-tk@8/8.6.17/lib
/opt/homebrew/Cellar/tcl-tk@8/8.6.16/lib
/opt/homebrew/opt/tcl-tk/lib /usr/local/lib)

View File

@ -22,16 +22,16 @@
//
// This notice may not be removed or altered from any source distribution.
#include <memory>
#include "ArcDcalcWaveforms.hh"
#include "Report.hh"
#include <memory>
#include "ArcDelayCalc.hh"
#include "Graph.hh"
#include "GraphDelayCalc.hh"
#include "Liberty.hh"
#include "Network.hh"
#include "Graph.hh"
#include "ArcDelayCalc.hh"
#include "GraphDelayCalc.hh"
#include "Report.hh"
namespace sta {
@ -83,4 +83,4 @@ ArcDcalcWaveforms::inputWaveform(ArcDcalcArg &dcalc_arg,
return Waveform();
}
} // namespace
} // namespace sta

View File

@ -51,5 +51,5 @@ protected:
const StaState *sta);
};
} // namespace
} // namespace sta

View File

@ -27,12 +27,12 @@
#include <cstdlib>
#include <string>
#include "StringUtil.hh"
#include "Units.hh"
#include "Liberty.hh"
#include "TimingArc.hh"
#include "Network.hh"
#include "Graph.hh"
#include "Liberty.hh"
#include "Network.hh"
#include "StringUtil.hh"
#include "TimingArc.hh"
#include "Units.hh"
namespace sta {
@ -135,7 +135,7 @@ ArcDcalcArg::ArcDcalcArg(const Pin *in_pin,
const Pin *drvr_pin,
Edge *edge,
const TimingArc *arc,
const Slew in_slew,
Slew in_slew,
float load_cap,
const Parasitic *parasitic) :
in_pin_(in_pin),
@ -165,17 +165,7 @@ ArcDcalcArg::ArcDcalcArg(const Pin *in_pin,
{
}
ArcDcalcArg::ArcDcalcArg(const ArcDcalcArg &arg) :
in_pin_(arg.in_pin_),
drvr_pin_(arg.drvr_pin_),
edge_(arg.edge_),
arc_(arg.arc_),
in_slew_(arg.in_slew_),
load_cap_(arg.load_cap_),
parasitic_(arg.parasitic_),
input_delay_(arg.input_delay_)
{
}
ArcDcalcArg::ArcDcalcArg(const ArcDcalcArg &arg) = default;
const RiseFall *
ArcDcalcArg::inEdge() const
@ -305,4 +295,4 @@ ArcDcalcResult::setLoadSlew(size_t load_idx,
load_slews_[load_idx] = load_slew;
}
} // namespace
} // namespace sta

View File

@ -45,7 +45,7 @@ class arnoldi1
public:
arnoldi1() { order=0; n=0; d=nullptr; e=nullptr; U=nullptr; ctot=0.0; sqc=0.0; }
~arnoldi1();
double elmore(int term_index);
double elmore(int k);
//
// calculate poles/residues for given rdrive
@ -70,12 +70,12 @@ class rcmodel : public ConcreteParasitic,
{
public:
rcmodel();
virtual ~rcmodel();
virtual float capacitance() const;
virtual PinSet unannotatedLoads(const Pin *drvr_pin,
const Parasitics *parasitics) const;
~rcmodel() override;
float capacitance() const override;
PinSet unannotatedLoads(const Pin *drvr_pin,
const Parasitics *parasitics) const override;
const Pin **pinV; // [n]
const Pin **pinV{nullptr}; // [n]
};
struct timing_table
@ -86,4 +86,4 @@ struct timing_table
float in_slew;
};
} // namespace
} // namespace sta

View File

@ -28,30 +28,34 @@
#include "ArnoldiDelayCalc.hh"
#include <cstdio>
#include <algorithm>
#include <cmath> // abs
#include <cstddef>
#include <cstdio>
#include <numbers>
#include "Report.hh"
#include "Debug.hh"
#include "Units.hh"
#include "Liberty.hh"
#include "TimingModel.hh"
#include "TimingArc.hh"
#include "TableModel.hh"
#include "PortDirection.hh"
#include "Network.hh"
#include "Graph.hh"
#include "Parasitics.hh"
#include "Sdc.hh"
#include "DelayCalc.hh"
#include "ArcDelayCalc.hh"
#include "LumpedCapDelayCalc.hh"
#include "GraphDelayCalc.hh"
#include "Variables.hh"
#include "Arnoldi.hh"
#include "ArnoldiReduce.hh"
#include "Debug.hh"
#include "DelayCalc.hh"
#include "Graph.hh"
#include "GraphDelayCalc.hh"
#include "Liberty.hh"
#include "LumpedCapDelayCalc.hh"
#include "Network.hh"
#include "Parasitics.hh"
#include "PortDirection.hh"
#include "Report.hh"
#include "Sdc.hh"
#include "TableModel.hh"
#include "TimingArc.hh"
#include "TimingModel.hh"
#include "Units.hh"
#include "Variables.hh"
namespace sta {
// NOLINTBEGIN(modernize-avoid-c-style-cast)
// wireload8 is n^2
// do not delete arnoldi parasitics
@ -76,7 +80,11 @@ delay_work_get_residues(delay_work *D,
int term_index);
static bool
tridiagEV(int n,double *d,double *e,double *p,double **v);
tridiagEV(int n,
const double *din,
const double *ein,
double *d,
double **v);
//////////////////////////////////////////////////////////////
@ -229,7 +237,7 @@ private:
double *c_x1,
double *c_y1);
rcmodel *rcmodel_;
rcmodel *rcmodel_{nullptr};
int _pinNmax;
double *_delayV;
double *_slewV;
@ -246,7 +254,6 @@ makeArnoldiDelayCalc(StaState *sta)
ArnoldiDelayCalc::ArnoldiDelayCalc(StaState *sta) :
LumpedCapDelayCalc(sta),
rcmodel_(nullptr),
reduce_(new ArnoldiReduce(sta)),
delay_work_(delay_work_create())
{
@ -362,7 +369,7 @@ ArnoldiDelayCalc::inputPortDelay(const Pin *,
for (int j=1;j<pin_n_;j++) {
double elmore = rcmodel_->elmore(j);
double wire_delay = 0.6931472*elmore;
double wire_delay = std::numbers::ln2 * elmore;
double load_slew = in_slew + c_log*elmore/slew_derate;
_delayV[j] = wire_delay;
_slewV[j] = load_slew;
@ -487,7 +494,7 @@ ArnoldiDelayCalc::reportGateDelay(const Pin *drvr_pin,
arnoldi1::~arnoldi1()
{
free(d);
free(U);
free(reinterpret_cast<void *>(U));
}
double
@ -506,13 +513,16 @@ delay_work_create()
int j;
delay_work *D = (delay_work*)malloc(sizeof(delay_work));
D->nmax = 256;
D->resi = (double**)malloc(D->nmax*sizeof(double*));
D->resi[0] = (double*)malloc(D->nmax*32*sizeof(double));
for (j=1;j<D->nmax;j++) D->resi[j] = D->resi[0] + j*32;
D->v[0] = (double*)malloc(32*32*sizeof(double));
for (j=1;j<32;j++) D->v[j] = D->v[0] + j*32;
D->w[0] = (double*)malloc(32*D->nmax*sizeof(double));
for (j=1;j<32;j++) D->w[j] = D->w[0] + j*D->nmax;
D->resi = (double**)malloc(static_cast<size_t>(D->nmax) * sizeof(double *));
D->resi[0] = (double*)malloc(static_cast<size_t>(D->nmax) * 32u * sizeof(double));
for (j=1;j<D->nmax;j++)
D->resi[j] = D->resi[0] + static_cast<ptrdiff_t>(j) * 32;
D->v[0] = (double*)malloc(static_cast<size_t>(32) * 32u * sizeof(double));
for (j=1;j<32;j++)
D->v[j] = D->v[0] + static_cast<ptrdiff_t>(j) * 32;
D->w[0] = (double*)malloc(32u * static_cast<size_t>(D->nmax) * sizeof(double));
for (j=1;j<32;j++)
D->w[j] = D->w[0] + static_cast<ptrdiff_t>(j) * D->nmax;
D->lo_thresh = 0.0;
D->hi_thresh = 0.0;
D->slew_derate = 0.0;
@ -535,7 +545,7 @@ static void
delay_work_destroy(delay_work *D)
{
free(D->resi[0]);
free(D->resi);
free(reinterpret_cast<void *>(D->resi));
free(D->v[0]);
free(D->w[0]);
free(D);
@ -547,15 +557,17 @@ delay_work_alloc(delay_work *D,int n)
if (n<=D->nmax) return;
free(D->w[0]);
free(D->resi[0]);
free(D->resi);
free(reinterpret_cast<void *>(D->resi));
D->nmax *= 2;
if (n > D->nmax) D->nmax = n;
D->nmax = std::max(n, D->nmax);
int j;
D->resi = (double**)malloc(D->nmax*sizeof(double*));
D->resi[0] = (double*)malloc(D->nmax*32*sizeof(double));
for (j=1;j<D->nmax;j++) D->resi[j] = D->resi[0] + j*32;
D->w[0] = (double*)malloc(32*D->nmax*sizeof(double));
for (j=1;j<32;j++) D->w[j] = D->w[0] + j*D->nmax;
D->resi = (double**)malloc(static_cast<size_t>(D->nmax) * sizeof(double *));
D->resi[0] = (double*)malloc(static_cast<size_t>(D->nmax) * 32u * sizeof(double));
for (j=1;j<D->nmax;j++)
D->resi[j] = D->resi[0] + static_cast<ptrdiff_t>(j) * 32;
D->w[0] = (double*)malloc(32u * static_cast<size_t>(D->nmax) * sizeof(double));
for (j=1;j<32;j++)
D->w[j] = D->w[0] + static_cast<ptrdiff_t>(j) * D->nmax;
}
void
@ -622,8 +634,7 @@ void arnoldi1::calculate_poles_res(delay_work *D,
d[0] = dsave;
for (h=0;h<order;h++) {
if (p[h]<1e-14) // .01ps
p[h]=1e-14;
p[h] = std::max(p[h], 1e-14); // .01ps floor
p[h] = 1.0/p[h];
}
@ -653,10 +664,10 @@ void arnoldi1::calculate_poles_res(delay_work *D,
// tridiagonal eigenvalues and eigenvectors
// assuming all eigenvalues are positive
//
// tridiagEV(int n,double *d,double *e,double *p,double **v)
// d[0]..d[n-1] diagonal elements
// e[0]..e[n-2] off-diagonal elements
// p[0],..p[n-1] the eigenvalues
// tridiagEV(n, din, ein, d, v)
// din[0]..din[n-1] diagonal elements (input)
// ein[0]..ein[n-2] off-diagonal elements (input)
// d[0],..d[n-1] the eigenvalues (output)
// v[0],..v[n-1] the eigenvectors
// M*v[j] = p[j]*v[j]
//
@ -665,7 +676,11 @@ void arnoldi1::calculate_poles_res(delay_work *D,
// (M*v[j])[n-1] = d[n-1]*v[j][n-1]+e[n-2]*v[j][n-2]
//
static bool
tridiagEV(int n,double *din,double *ein,double *d,double **v)
tridiagEV(int n,
const double *din,
const double *ein,
double *d,
double **v)
{
int j,k;
for (j=0;j<n;j++) for (k=0;k<n;k++) v[j][k]=0.0;
@ -747,7 +762,12 @@ tridiagEV(int n,double *din,double *ein,double *d,double **v)
// get a waveform point
static void
pr_get_v(double t, double s, int order, double *p, double *rr, double *va)
pr_get_v(double t,
double s,
int order,
const double *p,
const double *rr,
double *va)
{
*va = 0.0;
int h;
@ -765,8 +785,13 @@ pr_get_v(double t, double s, int order, double *p, double *rr, double *va)
}
static void
get_dv(double t, double s, int order, double *p, double *rr,
double *va, double *dva)
get_dv(double t,
double s,
int order,
const double *p,
const double *rr,
double *va,
double *dva)
{
*va = 0.0;
*dva = 0.0;
@ -790,12 +815,19 @@ get_dv(double t, double s, int order, double *p, double *rr,
}
static double
solve_t_bracketed(double s,int order,double *p,double *rr,
double val,double x1,double x2,double v1,double v2)
solve_t_bracketed(double s,
int order,
const double *p,
const double *rr,
double val,
double x1,
double x2,
double v1,
double v2)
{
int j;
double df,dx,dxold,f,f2,f1;
double temp,xh,xl,rts;
double temp,xh,x_lo,rts;
double xacc = .001e-12; // .001ps
f1 = v1-val;
f2 = v2-val;
@ -803,12 +835,12 @@ solve_t_bracketed(double s,int order,double *p,double *rr,
if (f2==0.0) return x2;
rts = (f1*x2-f2*x1)/(f1-f2);
if (f1<f2) {
xl = x1;
x_lo = x1;
xh = x2;
if (0.0<f1) return x1;
if (f2<0.0) return x2;
} else {
xl = x2;
x_lo = x2;
xh = x1;
if (0.0<f2) return x2;
if (f1<0.0) return x1;
@ -819,19 +851,19 @@ solve_t_bracketed(double s,int order,double *p,double *rr,
f -= val;
double flast = 0.0;
for (j=1;j<10;j++) {
if ((((rts-xh)*df-f)*((rts-xl)*df-f) >= 0.0)
if ((((rts-xh)*df-f)*((rts-x_lo)*df-f) >= 0.0)
|| (std::abs(2.0*f) > std::abs(dxold*df))) {
dxold = dx;
dx = 0.5*(xh-xl);
dx = 0.5*(xh-x_lo);
if (flast*f >0.0) {
// 2 successive bisections in same direction,
// accelerate
if (f<0.0) dx = 0.9348*(xh-xl);
else dx = 0.0625*(xh-xl);
if (f<0.0) dx = 0.9348*(xh-x_lo);
else dx = 0.0625*(xh-x_lo);
}
flast = f;
rts = xl+dx;
if (xl == rts) {
rts = x_lo+dx;
if (x_lo == rts) {
return rts;
}
} else {
@ -849,13 +881,13 @@ solve_t_bracketed(double s,int order,double *p,double *rr,
}
get_dv(rts,s,order,p,rr,&f,&df); f -= val;
if (f<0.0)
xl = rts;
x_lo = rts;
else
xh = rts;
}
if (std::abs(f)<1e-6) // 1uV
return rts;
return 0.5*(xl+xh);
return 0.5*(x_lo+xh);
}
void
@ -949,8 +981,7 @@ ArnoldiDelayCalc::pr_solve3(double s,
for (h=1;h<order;h++) if (rr[h]>0.3 && rr[h]>rr[0]) { h0 = h; break; }
}
double p0 = p[h0];
if (p0>10e+9) // 1/10ns
p0=10e+9;
p0 = std::min(p0, 10e+9); // 1/10ns cap
double ps,vs,ta,va;
vs = 0.0;
for (h=0;h<order;h++) {
@ -1034,7 +1065,9 @@ ArnoldiDelayCalc::pr_solve3(double s,
ta = s + 0.7/p0;
pr_get_v(ta,s,order,p,rr,&va);
while (va>vmid) {
tmin5 = tmin8 = ta; vmin5 = tmin8 = va;
tmin5 = ta;
tmin8 = ta;
vmin5 = va;
ta += 0.7/p0;
pr_get_v(ta,s,order,p,rr,&va);
}
@ -1064,18 +1097,14 @@ ArnoldiDelayCalc::pr_solve3(double s,
pr_get_v(ta,s,order,p,rr,&va);
}
tmax2 = ta; vmax2 = va;
if (va < vmid) {
tmax5 = ta; vmax5 = va;
} else while (va > vmid) {
while (va > vmid) {
tmin5 = tmin8 = ta;
vmin5 = vmin8 = va;
ta += 1.0/p0;
pr_get_v(ta,s,order,p,rr,&va);
}
tmax5 = ta; vmax5 = va;
if (va < vlo) {
tmax8 = ta; vmax8 = va;
} else while (va > vlo) {
while (va > vlo) {
tmin8 = ta;
vmin8 = va;
ta += 1.0/p0;
@ -1248,11 +1277,12 @@ ArnoldiDelayCalc::ra_solve_for_s(delay_work *D,
if (x <= x1) {
y = y1 - 0.5*(x-x1);
if (y>1.0) y=1.0;
y = std::min(y, 1.0);
} else {
y = y1 - (x-x1)*(0.5 + 8*(x-x1));
if (y<y2) y=y2;
y = std::max(y, y2);
}
(void)y;
ra_solve_for_pt(p*s,vlo,&ptlo,&dlo);
ra_solve_for_pt(p*s,vhi,&pthi,&dhi);
@ -1405,7 +1435,6 @@ ArnoldiDelayCalc::ar1_ceff_delay(delay_work *D,
if (rdelay == 0.0) {
rdelay = 1e+3; // 1kohm
}
r = rdelay;
r = ra_get_r(D,tab,rdelay,ctot);
if (! (r>0.0
&& r<100e+3)) // 100khom
@ -1436,9 +1465,6 @@ ArnoldiDelayCalc::ar1_ceff_delay(delay_work *D,
units_->timeUnit()->asString(tlox-thix));
}
ceff = ctot;
tab->table->gateDelay(tab->pvt, tab->in_slew, ceff, df, sf);
t50_sy = delayAsFloat(df);
t50_sr = ra_solve_for_t(1.0/(r*ceff),s,0.5);
// calculate s,r,mod -> t50_srmod,
// then t50_srmod+t50_sy-t50_sr
@ -1488,4 +1514,5 @@ ArnoldiDelayCalc::ar1_ceff_delay(delay_work *D,
}
}
} // namespace
// NOLINTEND(modernize-avoid-c-style-cast)
} // namespace sta

View File

@ -32,4 +32,4 @@ class StaState;
ArcDelayCalc *
makeArnoldiDelayCalc(StaState *sta);
} // namespace
} // namespace sta

View File

@ -28,19 +28,22 @@
#include "ArnoldiReduce.hh"
#include "Debug.hh"
#include "MinMax.hh"
#include "Sdc.hh"
#include "Network.hh"
#include "Units.hh"
#include <algorithm>
#include "Arnoldi.hh"
#include "Debug.hh"
#include "Format.hh"
#include "MinMax.hh"
#include "Network.hh"
#include "Sdc.hh"
#include "Units.hh"
#include "parasitics/ConcreteParasiticsPvt.hh"
namespace sta {
// This is legacy C-style code.
// NOLINTBEGIN(modernize-avoid-c-style-cast, bugprone-multi-level-implicit-pointer-conversion, bugprone-implicit-widening-of-multiplication-result)
rcmodel::rcmodel() :
pinV(nullptr)
rcmodel::rcmodel()
{
}
@ -87,11 +90,7 @@ const int ArnoldiReduce::ts_point_count_incr_ = 1024;
const int ArnoldiReduce::ts_edge_count_incr_ = 1024;
ArnoldiReduce::ArnoldiReduce(StaState *sta) :
StaState(sta),
ts_pointNmax(1024),
ts_edgeNmax(1024),
termNmax(256),
dNmax(8)
StaState(sta)
{
ts_pointV = (ts_point *)malloc(ts_pointNmax * sizeof(ts_point));
ts_ordV = (int *)malloc(ts_pointNmax * sizeof(int));
@ -351,14 +350,14 @@ ArnoldiReduce::makeRcmodelDfs(ts_point *pdrv)
ts_point *p0 = ts_pointV;
ts_point *pend = p0 + ts_pointN;
for (p = p0; p != pend; p++)
p->visited = 0;
p->visited = false;
ts_edge *e;
ts_edge **stackV = ts_stackV;
int stackN = 1;
stackV[0] = e = pdrv->eV[0];
ts_orient(pdrv, e);
pdrv->visited = 1;
pdrv->visited = true;
pdrv->in_edge = nullptr;
pdrv->ts = 0;
ts_ordV[0] = pdrv - p0;
@ -376,7 +375,7 @@ ArnoldiReduce::makeRcmodelDfs(ts_point *pdrv)
}
else {
// try to descend
q->visited = 1;
q->visited = true;
q->ts = ts_ordN++;
ts_pordV[q->ts] = q;
ts_ordV[q->ts] = q - p0;
@ -531,9 +530,7 @@ ArnoldiReduce::makeRcmodelFromTs()
u0 = _u0;
u1 = _u1;
double sum, e1;
order = max_order;
if (n < order)
order = n;
order = std::min(n, max_order);
par[0] = -1;
r[0] = 0.0;
@ -682,4 +679,5 @@ ArnoldiReduce::makeRcmodelFromW()
return mod;
}
// NOLINTEND(modernize-avoid-c-style-cast, bugprone-multi-level-implicit-pointer-conversion, bugprone-implicit-widening-of-multiplication-result)
} // namespace sta

View File

@ -52,7 +52,7 @@ class ArnoldiReduce : public StaState
{
public:
ArnoldiReduce(StaState *sta);
~ArnoldiReduce();
~ArnoldiReduce() override;
rcmodel *reduceToArnoldi(Parasitic *parasitic,
const Pin *drvr_pin,
float coupling_cap_factor,
@ -86,11 +86,11 @@ protected:
// rcWork
ts_point *ts_pointV;
int ts_pointN;
int ts_pointNmax;
int ts_pointNmax{1024};
static const int ts_point_count_incr_;
ts_edge *ts_edgeV;
int ts_edgeN;
int ts_edgeNmax;
int ts_edgeNmax{1024};
static const int ts_edge_count_incr_;
ts_edge **ts_eV;
ts_edge **ts_stackV;
@ -98,14 +98,14 @@ protected:
ts_point **ts_pordV;
int ts_ordN;
int termNmax;
int termNmax{256};
int termN;
ts_point *pterm0;
const Pin **pinV; // fixed order, offset from pterm0
int *termV; // from drv-ordered to fixed order
int *outV; // from drv-ordered to ts_pordV
int dNmax;
int dNmax{8};
double *d;
double *e;
double *U0;
@ -120,4 +120,4 @@ protected:
int order;
};
} // namespace
} // namespace sta

View File

@ -24,19 +24,20 @@
#include "CcsCeffDelayCalc.hh"
#include <algorithm>
#include <cmath>
#include "Debug.hh"
#include "Units.hh"
#include "Liberty.hh"
#include "TimingArc.hh"
#include "Network.hh"
#include "Graph.hh"
#include "Scene.hh"
#include "Parasitics.hh"
#include "GraphDelayCalc.hh"
#include "DmpDelayCalc.hh"
#include "FindRoot.hh"
#include "Graph.hh"
#include "GraphDelayCalc.hh"
#include "Liberty.hh"
#include "Network.hh"
#include "Parasitics.hh"
#include "Scene.hh"
#include "TimingArc.hh"
#include "Units.hh"
namespace sta {
@ -53,10 +54,6 @@ makeCcsCeffDelayCalc(StaState *sta)
CcsCeffDelayCalc::CcsCeffDelayCalc(StaState *sta) :
LumpedCapDelayCalc(sta),
output_waveforms_(nullptr),
// Includes the Vh:Vdd region.
region_count_(0),
vl_fail_(false),
watch_pin_values_(network_),
capacitance_unit_(units_->capacitanceUnit()),
table_dcalc_(makeDmpCeffElmoreDelayCalc(sta))
@ -176,8 +173,8 @@ CcsCeffDelayCalc::gateDelaySlew(const LibertyLibrary *drvr_library,
}
for (size_t i = 0; i < region_count_; i++) {
double v1 = region_volts_[i];
double v2 = region_volts_[i + 1];
double seg_v1 = region_volts_[i];
double seg_v2 = region_volts_[i + 1];
double t1 = region_times_[i];
double t2 = region_times_[i + 1];
@ -186,11 +183,11 @@ CcsCeffDelayCalc::gateDelaySlew(const LibertyLibrary *drvr_library,
// for the charge on c1 from previous segments so it does not
// work well.
double c1_v1, c1_v2, ignore;
vl(t1, rpi_ * c1_, c1_v1, ignore);
vl(t2, rpi_ * c1_, c1_v2, ignore);
double q1 = v1 * c2_ + c1_v1 * c1_;
double q2 = v2 * c2_ + c1_v2 * c1_;
double ceff = (q2 - q1) / (v2 - v1);
vLoad(t1, rpi_ * c1_, c1_v1, ignore);
vLoad(t2, rpi_ * c1_, c1_v2, ignore);
double q1 = seg_v1 * c2_ + c1_v1 * c1_;
double q2 = seg_v2 * c2_ + c1_v2 * c1_;
double ceff = (q2 - q1) / (seg_v2 - seg_v1);
debugPrint(debug_, "ccs_dcalc", 2, "ceff {}",
capacitance_unit_->asString(ceff));
@ -297,7 +294,7 @@ CcsCeffDelayCalc::initRegions(const LibertyLibrary *drvr_library,
report_->error(1701, "unsupported ccs region count.");
break;
}
fill(region_ceff_.begin(), region_ceff_.end(), c2_ + c1_);
std::ranges::fill(region_ceff_, c2_ + c1_);
}
void
@ -402,11 +399,11 @@ rampElmoreV(double t,
// Elmore (one pole) response to 2 segment ramps [0, vth] slew1, [vth, vdd] slew2.
void
CcsCeffDelayCalc::vl(double t,
double elmore,
// Return values.
double &vl,
double &dvl_dt)
CcsCeffDelayCalc::vLoad(double t,
double elmore,
// Return values.
double &vl,
double &dvl_dt)
{
vl = 0.0;
dvl_dt = 0.0;
@ -431,11 +428,11 @@ CcsCeffDelayCalc::vl(double t,
// for debugging
double
CcsCeffDelayCalc::vl(double t,
double elmore)
CcsCeffDelayCalc::vLoad(double t,
double elmore)
{
double vl1, dvl_dt;
vl(t, elmore, vl1, dvl_dt);
vLoad(t, elmore, vl1, dvl_dt);
return vl1;
}
@ -447,7 +444,7 @@ CcsCeffDelayCalc::findVlTime(double v,
double t_final = region_ramp_times_[region_count_];
auto [time, failed] =
findRoot([&](double t, double &y, double &dy) {
vl(t, elmore, y, dy);
vLoad(t, elmore, y, dy);
y -= v;
},
t_init, t_final + elmore * 3.0, .001, 20);
@ -539,7 +536,7 @@ CcsCeffDelayCalc::loadWaveform(const Pin *load_pin)
load_times->push_back(t);
double ignore;
vl(t, elmore, v, ignore);
vLoad(t, elmore, v, ignore);
double v1 = (drvr_rf_ == RiseFall::rise()) ? v : vdd_ - v;
load_volts->push_back(v1);
}

View File

@ -24,8 +24,8 @@
#pragma once
#include "LumpedCapDelayCalc.hh"
#include "ArcDcalcWaveforms.hh"
#include "LumpedCapDelayCalc.hh"
namespace sta {
@ -39,7 +39,7 @@ class CcsCeffDelayCalc : public LumpedCapDelayCalc,
{
public:
CcsCeffDelayCalc(StaState *sta);
virtual ~CcsCeffDelayCalc();
~CcsCeffDelayCalc() override;
ArcDelayCalc *copy() override;
std::string_view name() const override { return "ccs_ceff"; }
bool reduceSupported() const override { return true; }
@ -68,7 +68,7 @@ public:
Waveform watchWaveform(const Pin *pin) override;
protected:
typedef std::vector<double> Region;
using Region = std::vector<double>;
void gateDelaySlew(const LibertyLibrary *drvr_library,
// Return values.
@ -106,13 +106,13 @@ protected:
const Pin *load_pin,
const Scene *scene,
const MinMax *min_max);
void vl(double t,
double elmore,
// Return values.
double &vl,
double &dvl_dt);
double vl(double t,
double elmore);
void vLoad(double t,
double elmore,
// Return values.
double &vl,
double &dvl_dt);
double vLoad(double t,
double elmore);
void fail(std::string_view reason);
const Pin *drvr_pin_;
@ -122,7 +122,7 @@ protected:
Parasitics *parasitics_;
const Parasitic *parasitic_;
OutputWaveforms *output_waveforms_;
OutputWaveforms *output_waveforms_{nullptr};
double ref_time_;
float vdd_;
float vth_;
@ -133,7 +133,7 @@ protected:
float rpi_;
float c1_;
size_t region_count_;
size_t region_count_{0};
size_t region_vl_idx_;
size_t region_vth_idx_;
size_t region_vh_idx_;
@ -146,7 +146,7 @@ protected:
Region region_time_offsets_;
Region region_ramp_times_;
Region region_ramp_slopes_;
bool vl_fail_;
bool vl_fail_{false};
// Waveform recording.
WatchPinValuesMap watch_pin_values_;
@ -155,4 +155,4 @@ protected:
ArcDelayCalc *table_dcalc_;
};
} // namespace
} // namespace sta

View File

@ -1,5 +1,5 @@
// OpenSTA, Static Timing Analyzer
// Copyright (c) 2025, Parallax Software, Inc.
// Copyright (c) 2026, Parallax Software, Inc.
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
@ -26,10 +26,10 @@
#include <cmath>
#include "StaConfig.hh"
#include "Fuzzy.hh"
#include "Units.hh"
#include "StaConfig.hh"
#include "StaState.hh"
#include "Units.hh"
#include "Variables.hh"
namespace sta {
@ -43,18 +43,18 @@ initDelayConstants()
delay_init_values[MinMax::maxIndex()] = MinMax::max()->initValue();
}
Delay::Delay() :
Delay::Delay() noexcept :
values_{0.0, 0.0, 0.0, 0.0}
{
}
Delay::Delay(float mean) :
Delay::Delay(float mean) noexcept :
values_{mean, 0.0, 0.0, 0.0}
{
}
Delay::Delay(float mean,
float std_dev2) :
float std_dev2) noexcept :
values_{mean, 0.0, std_dev2, 0.0}
{
}
@ -62,18 +62,19 @@ Delay::Delay(float mean,
Delay::Delay(float mean,
float mean_shift,
float std_dev2,
float skewness) :
float skewness) noexcept :
values_{mean, mean_shift, std_dev2, skewness}
{
}
void
Delay &
Delay::operator=(float delay)
{
values_[0] = delay;
values_[1] = 0.0;
values_[2] = 0.0;
values_[3] = 0.0;
return *this;
}
void
@ -126,12 +127,12 @@ Delay::setSkewness(float skewness)
////////////////////////////////////////////////////////////////
DelayDbl::DelayDbl() :
DelayDbl::DelayDbl() noexcept :
values_{0.0, 0.0, 0.0, 0.0}
{
}
DelayDbl::DelayDbl(double mean) :
DelayDbl::DelayDbl(double mean) noexcept :
values_{mean, 0.0, 0.0, 0.0}
{
}
@ -166,13 +167,14 @@ DelayDbl::setValues(double mean,
values_[3] = skewnes;
}
void
DelayDbl &
DelayDbl::operator=(double delay)
{
values_[0] = delay;
values_[1] = 0.0;
values_[2] = 0.0;
values_[3] = 0.0;
return *this;
}
////////////////////////////////////////////////////////////////
@ -520,4 +522,4 @@ delayStdDev2(const Delay &delay,
return sta->delayOps()->stdDev2(delay, early_late);
}
} // namespace
} // namespace sta

View File

@ -27,18 +27,18 @@
#include <map>
#include <string>
#include "ContainerHelpers.hh"
#include "StringUtil.hh"
#include "UnitDelayCalc.hh"
#include "LumpedCapDelayCalc.hh"
#include "DmpDelayCalc.hh"
#include "ArnoldiDelayCalc.hh"
#include "CcsCeffDelayCalc.hh"
#include "ContainerHelpers.hh"
#include "DmpDelayCalc.hh"
#include "LumpedCapDelayCalc.hh"
#include "PrimaDelayCalc.hh"
#include "StringUtil.hh"
#include "UnitDelayCalc.hh"
namespace sta {
typedef std::map<std::string, MakeArcDelayCalc, std::less<>> DelayCalcMap;
using DelayCalcMap = std::map<std::string, MakeArcDelayCalc, std::less<>>;
static DelayCalcMap delay_calcs;
@ -93,4 +93,4 @@ delayCalcNames()
return names;
}
} // namespace
} // namespace sta

View File

@ -22,17 +22,15 @@
//
// This notice may not be removed or altered from any source distribution.
%module dcalc
%include <std_string.i>
%{
#include "DelayCalc.hh"
#include "ArcDelayCalc.hh"
#include "DelayCalc.hh"
#include "Sta.hh"
#include "dcalc/ArcDcalcWaveforms.hh"
#include "dcalc/PrimaDelayCalc.hh"
#include "Sta.hh"
%}

View File

@ -24,16 +24,16 @@
#include "DelayCalcBase.hh"
#include "Graph.hh"
#include "GraphDelayCalc.hh"
#include "Liberty.hh"
#include "TimingArc.hh"
#include "TimingModel.hh"
#include "TableModel.hh"
#include "Network.hh"
#include "Parasitics.hh"
#include "Graph.hh"
#include "Sdc.hh"
#include "Scene.hh"
#include "GraphDelayCalc.hh"
#include "Sdc.hh"
#include "TableModel.hh"
#include "TimingArc.hh"
#include "TimingModel.hh"
#include "Variables.hh"
namespace sta {
@ -239,4 +239,4 @@ DelayCalcBase::setDcalcArgParasiticSlew(ArcDcalcArgSeq &gates,
setDcalcArgParasiticSlew(gate, scene, min_max);
}
} // namespace
} // namespace sta

View File

@ -72,7 +72,7 @@ protected:
void thresholdAdjust(const Pin *load_pin,
const LibertyLibrary *drvr_library,
const RiseFall *rf,
double &load_delay,
double &wire_delay,
double &load_slew);
// Helper function for input ports driving dspf parasitic.
void dspfWireDelaySlew(const Pin *load_pin,
@ -89,4 +89,4 @@ protected:
using ArcDelayCalc::reduceParasitic;
};
} // namespace
} // namespace sta

View File

@ -1,5 +1,5 @@
// OpenSTA, Static Timing Analyzer
// Copyright (c) 2025, Parallax Software, Inc.
// Copyright (c) 2026, Parallax Software, Inc.
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
@ -27,10 +27,10 @@
#include <cmath> // sqrt
#include "Error.hh"
#include "Fuzzy.hh"
#include "Units.hh"
#include "Format.hh"
#include "Fuzzy.hh"
#include "StaState.hh"
#include "Units.hh"
#include "Variables.hh"
namespace sta {
@ -229,4 +229,4 @@ DelayOpsNormal::asStringVariance(const Delay &delay,
unit->asString(delay.stdDev(), digits));
}
} // namespace
} // namespace sta

View File

@ -1,5 +1,5 @@
// OpenSTA, Static Timing Analyzer
// Copyright (c) 2025, Parallax Software, Inc.
// Copyright (c) 2026, Parallax Software, Inc.
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
@ -27,8 +27,8 @@
#include "DelayScalar.hh"
#include "Fuzzy.hh"
#include "Units.hh"
#include "StaState.hh"
#include "Units.hh"
namespace sta {
@ -202,5 +202,5 @@ DelayOpsScalar::asStringVariance(const Delay &delay,
return unit->asString(delay.mean(), digits);
}
} // namespace
} // namespace sta

View File

@ -1,5 +1,5 @@
// OpenSTA, Static Timing Analyzer
// Copyright (c) 2025, Parallax Software, Inc.
// Copyright (c) 2026, Parallax Software, Inc.
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
@ -27,10 +27,10 @@
#include <cmath> // sqrt
#include "Error.hh"
#include "Fuzzy.hh"
#include "Units.hh"
#include "Format.hh"
#include "Fuzzy.hh"
#include "StaState.hh"
#include "Units.hh"
#include "Variables.hh"
namespace sta {
@ -290,4 +290,4 @@ DelayOpsSkewNormal::asStringVariance(const Delay &delay,
sta->units()->scalarUnit()->asString(delay.skewness(), digits));
}
} // namespace
} // namespace sta

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@ -40,17 +40,17 @@
#include <tuple>
#include <utility>
#include "Format.hh"
#include "Report.hh"
#include "Debug.hh"
#include "Units.hh"
#include "TimingArc.hh"
#include "TableModel.hh"
#include "Liberty.hh"
#include "Sdc.hh"
#include "Parasitics.hh"
#include "ArcDelayCalc.hh"
#include "Debug.hh"
#include "FindRoot.hh"
#include "Format.hh"
#include "Liberty.hh"
#include "Parasitics.hh"
#include "Report.hh"
#include "Sdc.hh"
#include "TableModel.hh"
#include "TimingArc.hh"
#include "Units.hh"
#include "Variables.hh"
namespace sta {
@ -72,7 +72,7 @@ class DmpError : public Exception
{
public:
DmpError(std::string_view what);
virtual const char *what() const noexcept { return what_.c_str(); }
const char *what() const noexcept override { return what_.c_str(); }
private:
std::string what_;
@ -127,7 +127,7 @@ protected:
void newtonRaphson();
// Find driver parameters t0, delta_t, Ceff.
void findDriverParams(double ceff);
std::pair<double, double> gateCapDelaySlew(double cl);
std::pair<double, double> gateCapDelaySlew(double ceff);
std::tuple<double, double, double> gateDelays(double ceff);
// Partial derivatives of y(t) jacobian (dydt0, dyddt, dydcl).
std::tuple<double, double, double> dy(double t,
@ -143,12 +143,12 @@ protected:
void showJacobian();
std::pair<double, double> findDriverDelaySlew();
double findVoCrossing(double vth,
double lower_bound,
double upper_bound);
double t_lower,
double t_upper);
void showVo();
double findVlCrossing(double vth,
double lower_bound,
double upper_bound);
double t_lower,
double t_upper);
void showVl();
void fail(std::string_view reason);
@ -177,9 +177,9 @@ protected:
const Pvt *pvt_;
const GateTableModel *gate_model_;
double in_slew_;
double c2_;
double rpi_;
double c1_;
double c2_{0.0};
double rpi_{0.0};
double c1_{0.0};
double rd_;
// Logic threshold (percentage of supply voltage).
@ -232,9 +232,6 @@ protected:
DmpAlg::DmpAlg(int nr_order,
StaState *sta) :
StaState(sta),
c2_(0.0),
rpi_(0.0),
c1_(0.0),
nr_order_(nr_order)
{
}
@ -465,8 +462,13 @@ DmpAlg::showVo()
{
report_->report(" t vo(t)");
double ub = voCrossingUpperBound();
for (double t = t0_; t < t0_ + ub; t += dt_ / 10.0)
const double step = dt_ / 10.0;
for (int i = 0;; ++i) {
double t = t0_ + step * i;
if (!(t < t0_ + ub))
break;
report_->report(" {:g} {:g}", t, Vo(t).first);
}
}
std::pair<double, double>
@ -567,8 +569,14 @@ DmpAlg::showVl()
{
report_->report(" t vl(t)");
double ub = vlCrossingUpperBound();
for (double t = t0_; t < t0_ + ub * 2.0; t += ub / 10.0)
const double step = ub / 10.0;
const double t_end = t0_ + ub * 2.0;
for (int i = 0;; ++i) {
double t = t0_ + step * i;
if (!(t < t_end))
break;
report_->report(" {:g} {:g}", t, Vl(t).first);
}
}
void
@ -605,9 +613,9 @@ public:
std::pair<double, double> loadDelaySlew(const Pin *,
double elmore) override;
void evalDmpEqns() override;
double voCrossingUpperBound() override;
private:
protected:
double voCrossingUpperBound() override;
std::pair<double, double> V0(double t) override;
std::pair<double, double> Vl0(double t) override;
};
@ -702,7 +710,11 @@ public:
double c1) override;
std::pair<double, double> gateDelaySlew() override;
void evalDmpEqns() override;
protected:
double voCrossingUpperBound() override;
std::pair<double, double> V0(double t) override;
std::pair<double, double> Vl0(double t) override;
private:
void findDriverParamsPi();
@ -710,39 +722,26 @@ private:
double dt,
double ceff_time,
double ceff);
std::pair<double, double> V0(double t) override;
std::pair<double, double> Vl0(double t) override;
// Poles/zero.
double p1_;
double p2_;
double z1_;
double p1_{0.0};
double p2_{0.0};
double z1_{0.0};
// Residues.
double k0_;
double k1_;
double k2_;
double k3_;
double k4_;
double k0_{0.0};
double k1_{0.0};
double k2_{0.0};
double k3_{0.0};
double k4_{0.0};
// Ipi coefficients.
double A_;
double B_;
double D_;
double A_{0.0};
double B_{0.0};
double D_{0.0};
};
DmpPi::DmpPi(StaState *sta) :
DmpAlg(3,
sta),
p1_(0.0),
p2_(0.0),
z1_(0.0),
k0_(0.0),
k1_(0.0),
k2_(0.0),
k3_(0.0),
k4_(0.0),
A_(0.0),
B_(0.0),
D_(0.0)
sta)
{
}
@ -846,8 +845,7 @@ DmpPi::evalDmpEqns()
throw DmpError("eqn eval failed: slew = 0");
double ceff_time = slew / (vh_ - vl_);
if (ceff_time > 1.4 * dt)
ceff_time = 1.4 * dt;
ceff_time = std::min(ceff_time, 1.4 * dt);
if (dt <= 0.0)
throw DmpError("eqn eval failed: dt < 0");
@ -949,6 +947,8 @@ class DmpOnePole : public DmpAlg
public:
DmpOnePole(StaState *sta);
void evalDmpEqns() override;
protected:
double voCrossingUpperBound() override;
};
@ -1018,29 +1018,24 @@ public:
double c1) override;
std::pair<double, double> gateDelaySlew() override;
private:
protected:
std::pair<double, double> V0(double t) override;
std::pair<double, double> Vl0(double t) override;
double voCrossingUpperBound() override;
private:
// Pole/zero.
double p1_;
double z1_;
double p1_{0.0};
double z1_{0.0};
// Residues.
double k0_;
double k1_;
double k2_;
double k3_;
double k0_{0.0};
double k1_{0.0};
double k2_{0.0};
double k3_{0.0};
};
DmpZeroC2::DmpZeroC2(StaState *sta) :
DmpOnePole(sta),
p1_(0.0),
z1_(0.0),
k0_(0.0),
k1_(0.0),
k2_(0.0),
k3_(0.0)
DmpOnePole(sta)
{
}
@ -1172,8 +1167,7 @@ DmpAlg::luDecomp()
double big = 0.0;
for (int j = 0; j < size; j++) {
double temp = std::abs(fjac_[i][j]);
if (temp > big)
big = temp;
big = std::max(temp, big);
}
if (big == 0.0)
throw DmpError("LU decomposition: no non-zero row element");
@ -1268,8 +1262,7 @@ DmpCeffDelayCalc::DmpCeffDelayCalc(StaState *sta) :
LumpedCapDelayCalc(sta),
dmp_cap_(new DmpCap(sta)),
dmp_pi_(new DmpPi(sta)),
dmp_zero_c2_(new DmpZeroC2(sta)),
dmp_alg_(nullptr)
dmp_zero_c2_(new DmpZeroC2(sta))
{
}

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@ -44,7 +44,7 @@ class DmpCeffDelayCalc : public LumpedCapDelayCalc
{
public:
DmpCeffDelayCalc(StaState *sta);
virtual ~DmpCeffDelayCalc();
~DmpCeffDelayCalc() override;
bool reduceSupported() const override { return true; }
ArcDcalcResult gateDelay(const Pin *drvr_pin,
const TimingArc *arc,
@ -98,7 +98,7 @@ private:
DmpCap *dmp_cap_;
DmpPi *dmp_pi_;
DmpZeroC2 *dmp_zero_c2_;
DmpAlg *dmp_alg_;
DmpAlg *dmp_alg_{nullptr};
};
} // namespace
} // namespace sta

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@ -24,15 +24,15 @@
#include "DmpDelayCalc.hh"
#include "DmpCeff.hh"
#include "GraphDelayCalc.hh"
#include "Liberty.hh"
#include "Network.hh"
#include "Parasitics.hh"
#include "PortDirection.hh"
#include "Sdc.hh"
#include "TableModel.hh"
#include "TimingArc.hh"
#include "Liberty.hh"
#include "PortDirection.hh"
#include "Network.hh"
#include "Sdc.hh"
#include "Parasitics.hh"
#include "GraphDelayCalc.hh"
#include "DmpCeff.hh"
namespace sta {
@ -164,7 +164,7 @@ public:
const Scene *scene,
const MinMax *min_max) override;
private:
protected:
void loadDelaySlew(const Pin *load_pin,
double drvr_slew,
const RiseFall *rf,
@ -173,6 +173,8 @@ private:
// Return values.
double &wire_delay,
double &load_slew) override;
private:
void loadDelay(double drvr_slew,
Parasitic *pole_residue,
double p1,
@ -190,11 +192,11 @@ private:
double tt,
double y_tt);
bool parasitic_is_pole_residue_;
float vth_;
float vl_;
float vh_;
float slew_derate_;
bool parasitic_is_pole_residue_{false};
float vth_{0.0F};
float vl_{0.0F};
float vh_{0.0F};
float slew_derate_{0.0F};
};
ArcDelayCalc *
@ -204,12 +206,7 @@ makeDmpCeffTwoPoleDelayCalc(StaState *sta)
}
DmpCeffTwoPoleDelayCalc::DmpCeffTwoPoleDelayCalc(StaState *sta) :
DmpCeffDelayCalc(sta),
parasitic_is_pole_residue_(false),
vth_(0.0),
vl_(0.0),
vh_(0.0),
slew_derate_(0.0)
DmpCeffDelayCalc(sta)
{
}
@ -334,7 +331,7 @@ DmpCeffTwoPoleDelayCalc::loadDelaySlew(const Pin *load_pin,
// Should handle PiElmore parasitic.
wire_delay = 0.0;
load_slew = drvr_slew;
Parasitic *pole_residue = 0;
Parasitic *pole_residue = nullptr;
if (parasitic_is_pole_residue_)
pole_residue = parasitics_->findPoleResidue(parasitic, load_pin);
if (pole_residue) {
@ -436,4 +433,4 @@ DmpCeffTwoPoleDelayCalc::loadDelay(double vth,
}
}
} // namespace
} // namespace sta

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@ -34,4 +34,4 @@ makeDmpCeffElmoreDelayCalc(StaState *sta);
ArcDelayCalc *
makeDmpCeffTwoPoleDelayCalc(StaState *sta);
} // namespace
} // namespace sta

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@ -29,7 +29,7 @@
namespace sta {
std::pair<double, bool>
findRoot(FindRootFunc func,
findRoot(const FindRootFunc &func,
double x1,
double x2,
double x_tol,
@ -42,7 +42,7 @@ findRoot(FindRootFunc func,
}
std::pair<double, bool>
findRoot(FindRootFunc func,
findRoot(const FindRootFunc &func,
double x1,
double y1,
double x2,
@ -98,4 +98,4 @@ findRoot(FindRootFunc func,
return {root, true};
}
} // namespace
} // namespace sta

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@ -36,7 +36,7 @@ using FindRootFunc = const std::function<void (double x,
// first: root estimate; second: true if the search failed.
std::pair<double, bool>
findRoot(FindRootFunc func,
findRoot(const FindRootFunc &func,
double x1,
double x2,
double x_tol,
@ -44,7 +44,7 @@ findRoot(FindRootFunc func,
// first: root estimate; second: true if the search failed.
std::pair<double, bool>
findRoot(FindRootFunc func,
findRoot(const FindRootFunc &func,
double x1,
double y1,
double x2,
@ -52,4 +52,4 @@ findRoot(FindRootFunc func,
double x_tol,
int max_iter);
} // namespace
} // namespace sta

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@ -24,35 +24,35 @@
#include "GraphDelayCalc.hh"
#include <cmath>
#include <array>
#include <cmath>
#include <set>
#include <string_view>
#include "ArcDelayCalc.hh"
#include "Bfs.hh"
#include "ClkNetwork.hh"
#include "ContainerHelpers.hh"
#include "Debug.hh"
#include "Stats.hh"
#include "MinMax.hh"
#include "Mutex.hh"
#include "TimingRole.hh"
#include "TimingArc.hh"
#include "Liberty.hh"
#include "PortDirection.hh"
#include "Network.hh"
#include "InputDrive.hh"
#include "Sdc.hh"
#include "Mode.hh"
#include "Graph.hh"
#include "InputDrive.hh"
#include "Liberty.hh"
#include "MinMax.hh"
#include "Mode.hh"
#include "Mutex.hh"
#include "NetCaps.hh"
#include "Network.hh"
#include "Parasitics.hh"
#include "search/Levelize.hh"
#include "PortDirection.hh"
#include "Sdc.hh"
#include "Scene.hh"
#include "SearchPred.hh"
#include "Bfs.hh"
#include "ArcDelayCalc.hh"
#include "NetCaps.hh"
#include "ClkNetwork.hh"
#include "Stats.hh"
#include "TimingArc.hh"
#include "TimingRole.hh"
#include "Variables.hh"
#include "search/Latches.hh"
#include "search/Levelize.hh"
namespace sta {
@ -143,15 +143,10 @@ DcalcNonLatchPred::searchThru(Edge *edge,
GraphDelayCalc::GraphDelayCalc(StaState *sta) :
StaState(sta),
observer_(nullptr),
delays_seeded_(false),
incremental_(false),
delays_exist_(false),
invalid_delays_(makeVertexSet(this)),
search_pred_(new DcalcPred(sta)),
search_non_latch_pred_(new DcalcNonLatchPred(sta)),
iter_(new BfsFwdIterator(BfsIndex::dcalc, search_non_latch_pred_, sta)),
incremental_delay_tolerance_(0.0)
iter_(new BfsFwdIterator(BfsIndex::dcalc, search_non_latch_pred_, sta))
{
}
@ -297,9 +292,9 @@ class FindVertexDelays : public VertexVisitor
{
public:
FindVertexDelays(GraphDelayCalc *graph_delay_calc1);
virtual ~FindVertexDelays();
virtual void visit(Vertex *vertex);
virtual VertexVisitor *copy() const;
~FindVertexDelays() override;
void visit(Vertex *vertex) override;
VertexVisitor *copy() const override;
protected:
GraphDelayCalc *graph_delay_calc_;
@ -419,7 +414,7 @@ GraphDelayCalc::seedDrvrSlew(Vertex *drvr_vertex,
if (drive) {
const LibertyCell *drvr_cell;
const LibertyPort *from_port, *to_port;
float *from_slews;
const DriveCellSlews *from_slews;
drive->driveCell(rf, min_max, drvr_cell, from_port,
from_slews, to_port);
if (drvr_cell) {
@ -562,7 +557,7 @@ LibertyPort *
GraphDelayCalc::driveCellDefaultFromPort(const LibertyCell *cell,
const LibertyPort *to_port)
{
LibertyPort *from_port = 0;
LibertyPort *from_port = nullptr;
int from_port_index = 0;
for (TimingArcSet *arc_set : cell->timingArcSetsTo(to_port)) {
LibertyPort *set_from_port = arc_set->from();
@ -599,7 +594,7 @@ GraphDelayCalc::findInputDriverDelay(const LibertyCell *drvr_cell,
Vertex *drvr_vertex,
const RiseFall *rf,
const LibertyPort *from_port,
float *from_slews,
const DriveCellSlews *from_slews,
const LibertyPort *to_port,
const Scene *scene,
const MinMax *min_max,
@ -611,7 +606,7 @@ GraphDelayCalc::findInputDriverDelay(const LibertyCell *drvr_cell,
for (TimingArcSet *arc_set : drvr_cell->timingArcSets(from_port, to_port)) {
for (TimingArc *arc : arc_set->arcs()) {
if (arc->toEdge()->asRiseFall() == rf) {
float from_slew = from_slews[arc->fromEdge()->index()];
float from_slew = (*from_slews)[arc->fromEdge()->index()];
findInputArcDelay(drvr_pin, drvr_vertex, arc, from_slew, scene, min_max,
arc_delay_calc);
}
@ -1270,19 +1265,19 @@ GraphDelayCalc::annotateLoadDelays(Vertex *drvr_vertex,
bool load_changed = false;
if (!load_vertex->slewAnnotated(drvr_rf, min_max)) {
if (drvr_vertex->slewAnnotated(drvr_rf, min_max)) {
// Copy the driver slew to the load if it is annotated.
const Slew drvr_slew = graph_->slew(drvr_vertex,drvr_rf,ap_index);
graph_->setSlew(load_vertex, drvr_rf, ap_index, drvr_slew);
// Copy the driver slew to the load if it is annotated.
const Slew drvr_slew = graph_->slew(drvr_vertex, drvr_rf, ap_index);
graph_->setSlew(load_vertex, drvr_rf, ap_index, drvr_slew);
load_changed = true;
}
else {
const Slew slew = graph_->slew(load_vertex, drvr_rf, ap_index);
if (!merge
}
else {
const Slew slew = graph_->slew(load_vertex, drvr_rf, ap_index);
if (!merge
|| delayGreater(load_slew, slew, min_max, this)) {
graph_->setSlew(load_vertex, drvr_rf, ap_index, load_slew);
graph_->setSlew(load_vertex, drvr_rf, ap_index, load_slew);
load_changed = true;
}
}
}
}
if (!graph_->wireDelayAnnotated(wire_edge, drvr_rf, ap_index)) {
// Multiple timing arcs with the same output transition
@ -1594,9 +1589,9 @@ GraphDelayCalc::findCheckEdgeDelays(Edge *edge,
const RiseFall *to_rf = arc->toEdge()->asRiseFall();
if (from_rf && to_rf) {
const LibertyPort *related_out_port = arc_set->relatedOut();
const Pin *related_out_pin = 0;
const Pin *related_out_pin = nullptr;
if (related_out_port)
related_out_pin = network_->findPin(inst, related_out_port);
related_out_pin = network_->findPin(inst, related_out_port);
for (Scene *scene : scenes_) {
for (const MinMax *min_max : MinMax::range()) {
@ -1677,7 +1672,7 @@ GraphDelayCalc::reportDelayCalc(const Edge *edge,
const RiseFall *to_rf = arc->toEdge()->asRiseFall();
if (from_rf && to_rf) {
const LibertyPort *related_out_port = arc_set->relatedOut();
const Pin *related_out_pin = 0;
const Pin *related_out_pin = nullptr;
if (related_out_port)
related_out_pin = network_->findPin(inst, related_out_port);
float related_out_cap = 0.0;
@ -1767,11 +1762,6 @@ GraphDelayCalc::minPeriod(const Pin *pin,
////////////////////////////////////////////////////////////////
MultiDrvrNet::MultiDrvrNet() :
dcalc_drvr_(nullptr)
{
}
void
MultiDrvrNet::netCaps(const RiseFall *drvr_rf,
const Scene *scene,
@ -1828,4 +1818,4 @@ MultiDrvrNet::parallelGates(const Network *network) const
return network->direction(dcalc_drvr_->pin())->isOutput();
}
} // namespace
} // namespace sta

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@ -27,15 +27,15 @@
#include <cmath> // isnan
#include "Debug.hh"
#include "Units.hh"
#include "GraphDelayCalc.hh"
#include "Liberty.hh"
#include "Network.hh"
#include "Parasitics.hh"
#include "PortDirection.hh"
#include "Sdc.hh"
#include "TimingArc.hh"
#include "TimingModel.hh"
#include "Liberty.hh"
#include "PortDirection.hh"
#include "Network.hh"
#include "Sdc.hh"
#include "Parasitics.hh"
#include "GraphDelayCalc.hh"
#include "Units.hh"
#include "Variables.hh"
namespace sta {
@ -203,4 +203,4 @@ LumpedCapDelayCalc::reportGateDelay(const Pin *check_pin,
return "";
}
} // namespace
} // namespace sta

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@ -61,7 +61,7 @@ public:
const LoadPinIndexMap &load_pin_index_map,
const Scene *scene,
const MinMax *min_max) override;
std::string reportGateDelay(const Pin *drvr_pin,
std::string reportGateDelay(const Pin *check_pin,
const TimingArc *arc,
const Slew &in_slew,
float load_cap,
@ -84,4 +84,4 @@ protected:
ArcDelayCalc *
makeLumpedCapDelayCalc(StaState *sta);
} // namespace
} // namespace sta

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@ -26,10 +26,6 @@
namespace sta {
NetCaps::NetCaps()
{
}
NetCaps::NetCaps(float pin_cap,
float wire_cap,
float fanout,
@ -53,4 +49,4 @@ NetCaps::init(float pin_cap,
has_net_load_ = has_net_load;
}
} // namespace
} // namespace sta

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@ -30,7 +30,7 @@ namespace sta {
class NetCaps
{
public:
NetCaps();
NetCaps() = default;
NetCaps(float pin_cap,
float wire_cap,
float fanout,
@ -51,4 +51,4 @@ private:
bool has_net_load_;
};
} // namespace
} // namespace sta

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@ -24,13 +24,13 @@
#include "ParallelDelayCalc.hh"
#include "TimingArc.hh"
#include "Scene.hh"
#include "Network.hh"
#include "Graph.hh"
#include "Sdc.hh"
#include "Liberty.hh"
#include "GraphDelayCalc.hh"
#include "Liberty.hh"
#include "Network.hh"
#include "Scene.hh"
#include "Sdc.hh"
#include "TimingArc.hh"
namespace sta {
@ -118,4 +118,4 @@ ParallelDelayCalc::gateDelaysParallel(ArcDcalcArgSeq &dcalc_args,
return dcalc_results;
}
} // namespace
} // namespace sta

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@ -24,8 +24,8 @@
#pragma once
#include <vector>
#include <map>
#include <vector>
#include "DelayCalcBase.hh"
@ -47,4 +47,4 @@ protected:
const MinMax *min_max);
};
} // namespace
} // namespace sta

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@ -24,32 +24,27 @@
#include "PrimaDelayCalc.hh"
#include <Eigen/LU>
#include <Eigen/QR>
#include <cmath> // abs
#include <string_view>
#include "Debug.hh"
#include "Units.hh"
#include "TimingArc.hh"
#include "Liberty.hh"
#include "PortDirection.hh"
#include "Network.hh"
#include "Sdc.hh"
#include "Scene.hh"
#include "Graph.hh"
#include "Parasitics.hh"
#include "GraphDelayCalc.hh"
#include "DmpDelayCalc.hh"
#include "Format.hh"
#include <Eigen/LU>
#include <Eigen/QR>
#include "Graph.hh"
#include "GraphDelayCalc.hh"
#include "Liberty.hh"
#include "Network.hh"
#include "Parasitics.hh"
#include "PortDirection.hh"
#include "Scene.hh"
#include "Sdc.hh"
#include "TimingArc.hh"
#include "Units.hh"
namespace sta {
using Eigen::ColPivHouseholderQR;
using Eigen::HouseholderQR;
using Eigen::SparseLU;
// Lawrence Pillage - “Electronic Circuit & System Simulation Methods” 1998
// McGraw-Hill, Inc. New York, NY.
@ -61,17 +56,7 @@ makePrimaDelayCalc(StaState *sta)
PrimaDelayCalc::PrimaDelayCalc(StaState *sta) :
DelayCalcBase(sta),
dcalc_args_(nullptr),
scene_(nullptr),
min_max_(nullptr),
parasitics_(nullptr),
parasitic_network_(nullptr),
load_pin_index_map_(nullptr),
pin_node_map_(network_),
prima_order_(3),
make_waveforms_(false),
waveform_drvr_pin_(nullptr),
waveform_load_pin_(nullptr),
watch_pin_values_(network_),
table_dcalc_(makeDmpCeffElmoreDelayCalc(sta))
{
@ -79,20 +64,18 @@ PrimaDelayCalc::PrimaDelayCalc(StaState *sta) :
PrimaDelayCalc::PrimaDelayCalc(const PrimaDelayCalc &dcalc) :
DelayCalcBase(dcalc),
dcalc_args_(nullptr),
load_pin_index_map_(nullptr),
pin_node_map_(network_),
node_index_map_(dcalc.node_index_map_),
prima_order_(dcalc.prima_order_),
make_waveforms_(false),
waveform_drvr_pin_(nullptr),
waveform_load_pin_(nullptr),
watch_pin_values_(network_),
table_dcalc_(makeDmpCeffElmoreDelayCalc(this))
{
}
PrimaDelayCalc::~PrimaDelayCalc() { delete table_dcalc_; }
PrimaDelayCalc::~PrimaDelayCalc()
{
delete table_dcalc_;
}
ArcDelayCalc *
PrimaDelayCalc::copy()
@ -359,7 +342,7 @@ PrimaDelayCalc::simulate1(const MatrixSd &G,
const Eigen::MatrixXd &B,
const Eigen::VectorXd &x_init,
const Eigen::MatrixXd &x_to_v,
const size_t order)
size_t order)
{
Eigen::VectorXd x(order);
Eigen::VectorXd x_prev(order);
@ -379,7 +362,7 @@ PrimaDelayCalc::simulate1(const MatrixSd &G,
MatrixSd A(order, order);
A = G + (2.0 / time_step_) * C;
A.makeCompressed();
SparseLU<MatrixSd> A_solver;
Eigen::SparseLU<MatrixSd> A_solver;
A_solver.compute(A);
// Initial time depends on ceff which impact delay, so use a sim step
@ -403,7 +386,10 @@ PrimaDelayCalc::simulate1(const MatrixSd &G,
if (make_waveforms_)
recordWaveformStep(time_begin);
for (double time = time_begin; time <= time_end; time += time_step_) {
for (size_t step = 0;; ++step) {
const double time = time_begin + step * time_step_;
if (time > time_end)
break;
setPortCurrents();
rhs = B * u_ + (1.0 / time_step_) * C * (3.0 * x_prev - x_prev2);
x = A_solver.solve(rhs);
@ -850,7 +836,7 @@ PrimaDelayCalc::primaReduce()
{
G_.makeCompressed();
// Step 3: solve G*R = B for R
SparseLU<MatrixSd> G_solver(G_);
Eigen::SparseLU<MatrixSd> G_solver(G_);
if (G_solver.info() != Eigen::Success)
report_->error(1752, "G matrix is singular.");
Eigen::MatrixXd R(order_, port_count_);
@ -1003,8 +989,8 @@ PrimaDelayCalc::reportGateDelay(const Pin *drvr_pin,
bool arg_fail = checkArgs(dcalc_args, scene, min_max);
if (arg_fail) {
const RiseFall *rf = arc->toEdge()->asRiseFall();
const Parasitic *reduced =
table_dcalc_->findParasitic(drvr_pin, rf, scene, min_max);
const Parasitic *reduced = table_dcalc_->findParasitic(drvr_pin, rf,
scene, min_max);
return table_dcalc_->reportGateDelay(drvr_pin, arc, in_slew, load_cap,
reduced, load_pin_index_map, scene,
min_max, digits);
@ -1042,7 +1028,7 @@ PinSeq
PrimaDelayCalc::watchPins() const
{
PinSeq pins;
for (auto pin_values : watch_pin_values_) {
for (const auto &pin_values : watch_pin_values_) {
const Pin *pin = pin_values.first;
pins.push_back(pin);
}
@ -1121,10 +1107,8 @@ void
PrimaDelayCalc::reportMatrix(Eigen::VectorXd &matrix)
{
std::string line = "| ";
for (Eigen::Index i = 0; i < matrix.rows(); i++) {
std::string entry =
for (Eigen::Index i = 0; i < matrix.rows(); i++)
line += sta::format("{:10.3e}", matrix.coeff(i)) + " ";
}
line += "|";
report_->reportLine(line);
}
@ -1133,8 +1117,8 @@ void
PrimaDelayCalc::reportVector(std::vector<double> &matrix)
{
std::string line = "| ";
for (size_t i = 0; i < matrix.size(); i++)
line += sta::format("{:10.3e}", matrix[i]) + " ";
for (const double &entry : matrix)
line += sta::format("{:10.3e}", entry) + " ";
line += "|";
report_->reportLine(line);
}

View File

@ -24,13 +24,14 @@
#pragma once
#include <vector>
#include <map>
#include <Eigen/SparseCore>
#include <Eigen/SparseLU>
#include <array>
#include <map>
#include <vector>
#include "LumpedCapDelayCalc.hh"
#include "ArcDcalcWaveforms.hh"
#include "LumpedCapDelayCalc.hh"
#include "Parasitics.hh"
namespace sta {
@ -57,7 +58,7 @@ class PrimaDelayCalc : public DelayCalcBase,
public:
PrimaDelayCalc(StaState *sta);
PrimaDelayCalc(const PrimaDelayCalc &dcalc);
~PrimaDelayCalc();
~PrimaDelayCalc() override;
ArcDelayCalc *copy() override;
void copyState(const StaState *sta) override;
std::string_view name() const override { return "prima"; }
@ -123,7 +124,7 @@ protected:
const Eigen::MatrixXd &B,
const Eigen::VectorXd &x_init,
const Eigen::MatrixXd &x_to_v,
const size_t order);
size_t order);
double maxTime();
double timeStep();
float driverResistance();
@ -178,15 +179,15 @@ protected:
void reportMatrix(Eigen::VectorXd &matrix);
void reportVector(std::vector<double> &matrix);
ArcDcalcArgSeq *dcalc_args_;
ArcDcalcArgSeq *dcalc_args_{nullptr};
size_t drvr_count_;
float load_cap_;
const Scene *scene_;
const MinMax *min_max_;
Parasitics *parasitics_;
const Parasitic *parasitic_network_;
const Scene *scene_{nullptr};
const MinMax *min_max_{nullptr};
Parasitics *parasitics_{nullptr};
const Parasitic *parasitic_network_{nullptr};
const RiseFall *drvr_rf_;
const LoadPinIndexMap *load_pin_index_map_;
const LoadPinIndexMap *load_pin_index_map_{nullptr};
PinNodeMap pin_node_map_; // Parasitic pin -> array index
NodeIndexMap node_index_map_; // Parasitic node -> array index
@ -210,7 +211,7 @@ protected:
Eigen::VectorXd u_;
// Prima reduced MNA eqns
size_t prima_order_;
size_t prima_order_{3};
Eigen::MatrixXd Vq_;
MatrixSd Gq_;
MatrixSd Cq_;
@ -231,9 +232,9 @@ protected:
double time_step_prev_;
// Waveform recording.
bool make_waveforms_;
const Pin *waveform_drvr_pin_;
const Pin *waveform_load_pin_;
bool make_waveforms_{false};
const Pin *waveform_drvr_pin_{nullptr};
const Pin *waveform_load_pin_{nullptr};
FloatSeq drvr_voltages_;
FloatSeq load_voltages_;
WatchPinValuesMap watch_pin_values_;
@ -248,7 +249,7 @@ protected:
static constexpr size_t threshold_vth = 1;
static constexpr size_t threshold_vh = 2;
static constexpr size_t measure_threshold_count_ = 3;
typedef std::array<double, measure_threshold_count_> ThresholdTimes;
using ThresholdTimes = std::array<double, measure_threshold_count_>;
// Vl Vth Vh
ThresholdTimes measure_thresholds_;
// Indexed by node number.
@ -263,4 +264,4 @@ protected:
using ArcDelayCalc::reduceParasitic;
};
} // namespace
} // namespace sta

View File

@ -187,4 +187,4 @@ UnitDelayCalc::finishDrvrPin()
{
}
} // namespace
} // namespace sta

View File

@ -109,4 +109,4 @@ protected:
ArcDelayCalc *
makeUnitDelayCalc(StaState *sta);
} // namespace
} // namespace sta

View File

@ -1703,7 +1703,7 @@ protected:
FloatSeq *waveform = new FloatSeq;
waveform->push_back(0.0f);
waveform->push_back(250.0f);
sta_->makeClock("clk", clk_pins, false, 500.0f, waveform, "", sta_->cmdMode());
sta_->makeClock("clk", *clk_pins, false, 500.0f, *waveform, "", sta_->cmdMode());
design_loaded_ = true;
}
@ -4174,7 +4174,7 @@ protected:
FloatSeq *waveform = new FloatSeq;
waveform->push_back(0.0f);
waveform->push_back(5.0f);
sta_->makeClock("clk", clk_pins, false, 10.0f, waveform, "", sta_->cmdMode());
sta_->makeClock("clk", *clk_pins, false, 10.0f, *waveform, "", sta_->cmdMode());
// Set input/output delay constraints to create constrained timing paths
Clock *clk = sta_->cmdSdc()->findClock("clk");
@ -4418,7 +4418,7 @@ protected:
FloatSeq *waveform = new FloatSeq;
waveform->push_back(0.0f);
waveform->push_back(5.0f);
sta_->makeClock("clk", clk_pins, false, 10.0f, waveform, "", sta_->cmdMode());
sta_->makeClock("clk", *clk_pins, false, 10.0f, *waveform, "", sta_->cmdMode());
Clock *clk = sta_->cmdSdc()->findClock("clk");
ASSERT_NE(clk, nullptr);
@ -4599,7 +4599,7 @@ TEST_F(MultiDriverDcalcTest, IncrementalClockPeriodChange) {
FloatSeq *waveform = new FloatSeq;
waveform->push_back(0.0f);
waveform->push_back(1.0f);
sta_->makeClock("clk", clk_pins, false, 2.0f, waveform, "", sta_->cmdMode());
sta_->makeClock("clk", *clk_pins, false, 2.0f, *waveform, "", sta_->cmdMode());
sta_->updateTiming(true);
Slack slack2 = sta_->worstSlack(MinMax::max());
@ -4735,7 +4735,7 @@ protected:
FloatSeq *waveform = new FloatSeq;
waveform->push_back(0.0f);
waveform->push_back(5.0f);
sta_->makeClock("clk", clk_pins, false, 10.0f, waveform, "", sta_->cmdMode());
sta_->makeClock("clk", *clk_pins, false, 10.0f, *waveform, "", sta_->cmdMode());
// Set input/output delay constraints to create constrained timing paths
Clock *clk = sta_->cmdSdc()->findClock("clk");
@ -4861,7 +4861,7 @@ TEST_F(DesignDcalcTest, IncrementalWithSpef) {
FloatSeq *waveform = new FloatSeq;
waveform->push_back(0.0f);
waveform->push_back(50.0f);
sta_->makeClock("clk", clk_pins, false, 100.0f, waveform, "", sta_->cmdMode());
sta_->makeClock("clk", *clk_pins, false, 100.0f, *waveform, "", sta_->cmdMode());
sta_->updateTiming(true);
Slack slack2 = sta_->worstSlack(MinMax::max());

View File

@ -108,9 +108,6 @@ in a class derived from Sta. Because the components refer to each
other, Sta::updateComponentsState() must be called to notify the
components if any of them are changed after creation.
The file liberty/LibertyExt.cc contains an example that shows how the
liberty reader is replaced with a custom one on the Sta object.
Units
-----
@ -291,7 +288,7 @@ in this arc set:
S r -> Z f
The liberty file reader can be customized to read attributes that are
not used by the STA. See liberty/LibertyExt.cc for an example.
not used by the STA.
Graph
-----

View File

@ -26,16 +26,16 @@
#include "ContainerHelpers.hh"
#include "Debug.hh"
#include "Stats.hh"
#include "FuncExpr.hh"
#include "Liberty.hh"
#include "MinMax.hh"
#include "Mutex.hh"
#include "Transition.hh"
#include "TimingRole.hh"
#include "TimingArc.hh"
#include "Liberty.hh"
#include "PortDirection.hh"
#include "Network.hh"
#include "FuncExpr.hh"
#include "PortDirection.hh"
#include "Stats.hh"
#include "TimingArc.hh"
#include "TimingRole.hh"
#include "Transition.hh"
#include "Variables.hh"
namespace sta {
@ -49,8 +49,6 @@ namespace sta {
Graph::Graph(StaState *sta,
DcalcAPIndex ap_count) :
StaState(sta),
vertices_(nullptr),
edges_(nullptr),
ap_count_(ap_count),
period_check_annotations_(network_),
reg_clk_vertices_(makeVertexSet(this))
@ -342,11 +340,10 @@ class MakeEdgesThruHierPin : public HierPinThruVisitor
{
public:
MakeEdgesThruHierPin(Graph *graph);
private:
void visit(const Pin *drvr,
const Pin *load) override;
private:
Graph *graph_;
};
@ -585,7 +582,7 @@ Graph::slew(const Vertex *vertex,
size_t slew_index = ap_index * RiseFall::index_count + rf->index();
const float *slews_flt = vertex->slewsFloat();
if (variables_->pocvEnabled()) {
const Slew *slews = std::bit_cast<const Slew*>(slews_flt);
const Slew *slews = reinterpret_cast<const Slew*>(slews_flt);
return slews[slew_index];
}
else
@ -598,7 +595,7 @@ Graph::slew(const Vertex *vertex,
{
const float *slews_flt = vertex->slewsFloat();
if (variables_->pocvEnabled()) {
const Slew *slews = std::bit_cast<const Slew*>(slews_flt);
const Slew *slews = reinterpret_cast<const Slew*>(slews_flt);
return slews[index];
}
else
@ -678,7 +675,7 @@ Graph::arcDelay(const Edge *edge,
{
size_t index = arc->index() * ap_count_ + ap_index;
if (variables_->pocvEnabled()) {
ArcDelay *delays = std::bit_cast<ArcDelay*>(edge->arcDelays());
const ArcDelay *delays = reinterpret_cast<const ArcDelay*>(edge->arcDelays());
return delays[index];
}
else {
@ -695,7 +692,7 @@ Graph::setArcDelay(Edge *edge,
{
size_t index = arc->index() * ap_count_ + ap_index;
if (variables_->pocvEnabled()) {
ArcDelay *delays = std::bit_cast<ArcDelay*>(edge->arcDelays());
ArcDelay *delays = reinterpret_cast<ArcDelay*>(edge->arcDelays());
delays[index] = delay;
}
else {
@ -711,7 +708,7 @@ Graph::wireArcDelay(const Edge *edge,
{
size_t index = rf->index() * ap_count_ + ap_index;
if (variables_->pocvEnabled()) {
ArcDelay *delays = std::bit_cast<ArcDelay*>(edge->arcDelays());
const ArcDelay *delays = reinterpret_cast<const ArcDelay*>(edge->arcDelays());
return delays[index];
}
else {
@ -728,7 +725,7 @@ Graph::setWireArcDelay(Edge *edge,
{
size_t index = rf->index() * ap_count_ + ap_index;
if (variables_->pocvEnabled()) {
ArcDelay *delays = std::bit_cast<ArcDelay*>(edge->arcDelays());
ArcDelay *delays = reinterpret_cast<ArcDelay*>(edge->arcDelays());
delays[index] = delay;
}
else {
@ -753,7 +750,7 @@ Graph::setArcDelayAnnotated(Edge *edge,
DcalcAPIndex ap_index,
bool annotated)
{
return edge->setArcDelayAnnotated(arc, ap_index, ap_count_, annotated);
edge->setArcDelayAnnotated(arc, ap_index, ap_count_, annotated);
}
bool
@ -774,7 +771,7 @@ Graph::setWireDelayAnnotated(Edge *edge,
{
int arc_index = TimingArcSet::wireArcIndex(rf);
TimingArc *arc = TimingArcSet::wireTimingArcSet()->findTimingArc(arc_index);
return edge->setArcDelayAnnotated(arc, ap_index, ap_count_, annotated);
edge->setArcDelayAnnotated(arc, ap_index, ap_count_, annotated);
}
void
@ -819,7 +816,7 @@ Graph::initSlews(Vertex *vertex)
{
size_t slew_count = slewCount();
if (variables_->pocvEnabled()) {
float *slews = std::bit_cast<float*>(new Slew[slew_count]{});
float *slews = reinterpret_cast<float*>(new Slew[slew_count]{});
vertex->setSlews(slews);
}
else {
@ -840,7 +837,7 @@ Graph::initArcDelays(Edge *edge)
size_t arc_count = edge->timingArcSet()->arcCount();
size_t delay_count = arc_count * ap_count_;
if (variables_->pocvEnabled()) {
float *delays = std::bit_cast<float*>(new ArcDelay[delay_count]{});
float *delays = reinterpret_cast<float*>(new ArcDelay[delay_count]{});
edge->setArcDelays(delays);
}
else {
@ -1187,7 +1184,7 @@ Vertex::setHasDownstreamClkPin(bool has_clk_pin)
bool
Vertex::bfsInQueue(BfsIndex index) const
{
return (bfs_in_queue_ >> unsigned(index)) & 1;
return (bfs_in_queue_ >> static_cast<unsigned>(index)) & 1;
}
void
@ -1195,9 +1192,9 @@ Vertex::setBfsInQueue(BfsIndex index,
bool value)
{
if (value)
bfs_in_queue_ |= 1 << int(index);
bfs_in_queue_ |= 1 << static_cast<unsigned>(index);
else
bfs_in_queue_ &= ~(1 << int(index));
bfs_in_queue_ &= ~(1 << static_cast<unsigned>(index));
}
////////////////////////////////////////////////////////////////
@ -1400,10 +1397,7 @@ VertexIterator::VertexIterator(Graph *graph) :
graph_(graph),
network_(graph->network()),
top_inst_(network_->topInstance()),
inst_iter_(network_->leafInstanceIterator()),
pin_iter_(nullptr),
vertex_(nullptr),
bidir_vertex_(nullptr)
inst_iter_(network_->leafInstanceIterator())
{
if (inst_iter_)
findNext();
@ -1580,4 +1574,4 @@ VertexIdLess::operator()(const Vertex *vertex1,
}
} // namespace
} // namespace sta

View File

@ -22,20 +22,18 @@
//
// This notice may not be removed or altered from any source distribution.
%module graph
%{
#include "Graph.hh"
#include "Clock.hh"
#include "FuncExpr.hh"
#include "TimingRole.hh"
#include "Graph.hh"
#include "search/Levelize.hh"
#include "Liberty.hh"
#include "Network.hh"
#include "Clock.hh"
#include "Scene.hh"
#include "Search.hh"
#include "Sdc.hh"
#include "Sta.hh"
#include "TimingRole.hh"
using namespace sta;

View File

@ -22,12 +22,13 @@
//
// This notice may not be removed or altered from any source distribution.
#include "GraphCmp.hh"
#include "ContainerHelpers.hh"
#include "StringUtil.hh"
#include "Graph.hh"
#include "Network.hh"
#include "NetworkCmp.hh"
#include "Graph.hh"
#include "GraphCmp.hh"
#include "StringUtil.hh"
namespace sta {
@ -73,4 +74,4 @@ sortEdges(EdgeSeq *edges,
sort(edges, EdgeLess(network, graph));
}
}
} // namespace sta

View File

@ -1075,7 +1075,7 @@ protected:
FloatSeq *waveform = new FloatSeq;
waveform->push_back(0.0f);
waveform->push_back(5.0f);
sta_->makeClock("clk", clk_pins, false, 10.0f, waveform, "", sta_->cmdMode());
sta_->makeClock("clk", *clk_pins, false, 10.0f, *waveform, "", sta_->cmdMode());
Clock *clk = sta_->cmdSdc()->findClock("clk");
ASSERT_NE(clk, nullptr);
@ -1455,7 +1455,7 @@ protected:
FloatSeq *wave1 = new FloatSeq;
wave1->push_back(0.0f);
wave1->push_back(5.0f);
sta_->makeClock("clk1", clk1_pins, false, 10.0f, wave1, "", sta_->cmdMode());
sta_->makeClock("clk1", *clk1_pins, false, 10.0f, *wave1, "", sta_->cmdMode());
// Create clock2
Pin *clk2_pin = network->findPin(top, "clk2");
@ -1465,7 +1465,7 @@ protected:
FloatSeq *wave2 = new FloatSeq;
wave2->push_back(0.0f);
wave2->push_back(2.5f);
sta_->makeClock("clk2", clk2_pins, false, 5.0f, wave2, "", sta_->cmdMode());
sta_->makeClock("clk2", *clk2_pins, false, 5.0f, *wave2, "", sta_->cmdMode());
// Input delays
Clock *clk1 = sta_->cmdSdc()->findClock("clk1");
@ -1664,7 +1664,7 @@ protected:
FloatSeq *waveform = new FloatSeq;
waveform->push_back(0.0f);
waveform->push_back(5.0f);
sta_->makeClock("clk", clk_pins, false, 10.0f, waveform, "", sta_->cmdMode());
sta_->makeClock("clk", *clk_pins, false, 10.0f, *waveform, "", sta_->cmdMode());
Clock *clk = sta_->cmdSdc()->findClock("clk");
ASSERT_NE(clk, nullptr);
@ -1929,7 +1929,7 @@ protected:
FloatSeq *waveform = new FloatSeq;
waveform->push_back(0.0f);
waveform->push_back(5.0f);
sta_->makeClock("clk", clk_pins, false, 10.0f, waveform, "", sta_->cmdMode());
sta_->makeClock("clk", *clk_pins, false, 10.0f, *waveform, "", sta_->cmdMode());
Clock *clk = sta_->cmdSdc()->findClock("clk");
ASSERT_NE(clk, nullptr);

View File

@ -24,20 +24,20 @@
#pragma once
#include <map>
#include <string>
#include <string_view>
#include <vector>
#include <map>
#include "MinMax.hh"
#include "LibertyClass.hh"
#include "TimingArc.hh"
#include "TableModel.hh"
#include "NetworkClass.hh"
#include "GraphClass.hh"
#include "Delay.hh"
#include "GraphClass.hh"
#include "LibertyClass.hh"
#include "MinMax.hh"
#include "NetworkClass.hh"
#include "ParasiticsClass.hh"
#include "StaState.hh"
#include "TableModel.hh"
#include "TimingArc.hh"
namespace sta {
@ -63,14 +63,14 @@ public:
const Pin *drvr_pin,
Edge *edge,
const TimingArc *arc,
const Slew in_slew,
Slew in_slew,
float load_cap,
const Parasitic *parasitic);
ArcDcalcArg(const Pin *in_pin,
const Pin *drvr_pin,
Edge *edge,
const TimingArc *arc,
float in_delay);
float input_delay);
const Pin *inPin() const { return in_pin_; }
const RiseFall *inEdge() const;
const Pin *drvrPin() const { return drvr_pin_; }
@ -160,7 +160,6 @@ class ArcDelayCalc : public StaState
{
public:
ArcDelayCalc(StaState *sta);
virtual ~ArcDelayCalc() {}
virtual ArcDelayCalc *copy() = 0;
virtual std::string_view name() const = 0;
@ -262,4 +261,4 @@ public:
virtual void finishDrvrPin() = 0;
};
} // namespace
} // namespace sta

View File

@ -26,8 +26,8 @@
#include <map>
#include "StaState.hh"
#include "LibertyClass.hh"
#include "StaState.hh"
struct DdNode;
struct DdManager;
@ -41,7 +41,7 @@ class Bdd : public StaState
{
public:
Bdd(const StaState *sta);
~Bdd();
~Bdd() override;
DdNode *funcBdd(const FuncExpr *expr);
DdNode *findNode(const LibertyPort *port);
const LibertyPort *nodePort(DdNode *node);
@ -58,4 +58,4 @@ private:
BddVarIdxPortMap bdd_var_idx_port_map_;
};
} // namespace
} // namespace sta

View File

@ -27,10 +27,10 @@
#include <mutex>
#include <vector>
#include "Iterator.hh"
#include "GraphClass.hh"
#include "VertexVisitor.hh"
#include "Iterator.hh"
#include "StaState.hh"
#include "VertexVisitor.hh"
namespace sta {
@ -50,10 +50,10 @@ using LevelQueue = std::vector<VertexSeq>;
// Vertices are marked as being in the queue by using a flag on
// the vertex indexed by bfs_index. A unique flag is only needed
// if the BFS in in use when other BFS's are simultaneously in use.
class BfsIterator : public StaState, Iterator<Vertex*>
class BfsIterator : public StaState,
public Iterator<Vertex*>
{
public:
virtual ~BfsIterator();
// Make sure that the BFS queue is deep enough for the max logic level.
void ensureSize();
// Reset to virgin state.
@ -130,7 +130,7 @@ public:
BfsFwdIterator(BfsIndex bfs_index,
SearchPred *search_pred,
StaState *sta);
virtual ~BfsFwdIterator();
~BfsFwdIterator() override;
void enqueueAdjacentVertices(Vertex *vertex,
SearchPred *search_pred) override;
void enqueueAdjacentVertices(Vertex *vertex,
@ -152,7 +152,7 @@ public:
BfsBkwdIterator(BfsIndex bfs_index,
SearchPred *search_pred,
StaState *sta);
virtual ~BfsBkwdIterator();
~BfsBkwdIterator() override;
void enqueueAdjacentVertices(Vertex *vertex,
SearchPred *search_pred) override;
void enqueueAdjacentVertices(Vertex *vertex,
@ -168,4 +168,4 @@ protected:
void incrLevel(Level &level) const override;
};
} // namespace
} // namespace sta

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@ -24,10 +24,10 @@
#pragma once
#include <vector>
#include <algorithm>
#include <functional>
#include <optional>
#include <vector>
namespace sta {

View File

@ -28,4 +28,4 @@ namespace sta {
enum class CircuitSim { hspice, ngspice, xyce };
} // namespace
} // namespace sta

View File

@ -26,10 +26,10 @@
#include <map>
#include "StaState.hh"
#include "NetworkClass.hh"
#include "GraphClass.hh"
#include "NetworkClass.hh"
#include "SdcClass.hh"
#include "StaState.hh"
namespace sta {
@ -44,7 +44,7 @@ class ClkNetwork : public StaState
public:
ClkNetwork(Mode *mode,
StaState *sta);
~ClkNetwork();
~ClkNetwork() override;
void ensureClkNetwork();
void clear();
bool isClock(const Pin *pin) const;
@ -73,9 +73,9 @@ private:
void findClkPins();
void findClkPins(bool ideal_only,
PinClksMap &clk_pin_map);
PinClksMap &pin_clks_map);
bool clk_pins_valid_;
bool clk_pins_valid_{false};
// pin -> clks
PinClksMap pin_clks_map_;
// pin -> ideal clks
@ -84,4 +84,4 @@ private:
ClkPinsMap clk_pins_map_;
};
} // namespace
} // namespace sta

View File

@ -27,11 +27,11 @@
#include <map>
#include <string>
#include "GraphClass.hh"
#include "MinMax.hh"
#include "RiseFallMinMax.hh"
#include "SdcClass.hh"
#include "SdcCmdComment.hh"
#include "GraphClass.hh"
namespace sta {
@ -57,8 +57,7 @@ public:
const Pin *defaultPin() const;
bool addToPins() const { return add_to_pins_; }
void setAddToPins(bool add_to_pins);
FloatSeq *waveform() { return waveform_; }
const FloatSeq *waveform() const { return waveform_; }
const FloatSeq &waveform() const { return waveform_; }
ClockEdge *edge(const RiseFall *rf) const;
int index() const { return index_; }
bool isPropagated() const { return is_propagated_; }
@ -82,11 +81,11 @@ public:
void removeSlew();
const RiseFallMinMax &slews() const { return slews_; }
void setSlewLimit(const RiseFallBoth *rf,
const PathClkOrData clk_data,
PathClkOrData clk_data,
const MinMax *min_max,
float slew);
void slewLimit(const RiseFall *rf,
const PathClkOrData clk_data,
PathClkOrData clk_data,
const MinMax *min_max,
// Return values.
float &slew,
@ -120,8 +119,8 @@ public:
int multiplyBy() const { return multiply_by_; }
float dutyCycle() const { return duty_cycle_; }
bool invert() const { return invert_; }
IntSeq *edges() const { return edges_; }
FloatSeq *edgeShifts() const { return edge_shifts_; }
const IntSeq &edges() const { return edges_; }
const FloatSeq &edgeShifts() const { return edge_shifts_; }
const RiseFall *masterClkEdgeTr(const RiseFall *rf) const;
bool combinational() const { return combinational_; }
bool isDivideByOneCombinational() const;
@ -138,13 +137,13 @@ protected:
Clock(std::string_view name,
int index,
const Network *network);
void initClk(PinSet *pins,
void initClk(const PinSet &pins,
bool add_to_pins,
float period,
FloatSeq *waveform,
const FloatSeq &waveform,
std::string_view comment,
const Network *network);
void initGeneratedClk(PinSet *pins,
void initGeneratedClk(const PinSet &pins,
bool add_to_pins,
Pin *src_pin,
Clock *master_clk,
@ -153,12 +152,12 @@ protected:
float duty_cycle,
bool invert,
bool combinational,
IntSeq *edges,
FloatSeq *edge_shifts,
const IntSeq &edges,
const FloatSeq &edge_shifts,
bool is_propagated,
std::string_view comment,
const Network *network);
void setPins(PinSet *pins,
void setPins(const PinSet &pins,
const Network *network);
void setMasterClk(Clock *master);
void makeClkEdges();
@ -170,31 +169,31 @@ protected:
std::string name_;
PinSet pins_;
bool add_to_pins_;
bool add_to_pins_{false};
// Hierarchical pins in pins_ become driver pins through the pin.
PinSet leaf_pins_;
float period_;
FloatSeq *waveform_;
bool waveform_valid_;
float period_{0.0};
FloatSeq waveform_;
bool waveform_valid_{false};
const int index_;
ClockEdge **clk_edges_;
bool is_propagated_;
std::array<ClockEdge*, RiseFall::index_count> clk_edges_;
bool is_propagated_{false};
RiseFallMinMax slews_;
RiseFallMinMax slew_limits_[path_clk_or_data_count];
ClockUncertainties *uncertainties_;
bool is_generated_;
ClockUncertainties *uncertainties_{nullptr};
bool is_generated_{false};
// Generated clock variables.
Pin *src_pin_;
Clock *master_clk_;
Pin *src_pin_{nullptr};
Clock *master_clk_{nullptr};
// True if the master clock is infered rather than specified by command.
bool master_clk_infered_;
int divide_by_;
int multiply_by_;
float duty_cycle_;
bool invert_;
bool combinational_;
IntSeq *edges_;
FloatSeq *edge_shifts_;
bool master_clk_infered_{false};
int divide_by_{0};
int multiply_by_{0};
float duty_cycle_{0};
bool invert_{false};
bool combinational_{false};
IntSeq edges_;
FloatSeq edge_shifts_;
private:
friend class Sdc;
@ -205,7 +204,6 @@ class ClockEdge
{
public:
Clock *clock() const { return clock_; }
~ClockEdge();
const RiseFall *transition() const { return rf_; }
float time() const { return time_; }
const std::string &name() const { return name_; }
@ -223,7 +221,7 @@ private:
Clock *clock_;
const RiseFall *rf_;
std::string name_;
float time_;
float time_{0.0};
int index_;
};
@ -291,4 +289,4 @@ int
compare(const ClockSet *set1,
const ClockSet *set2);
} // namespace
} // namespace sta

View File

@ -24,22 +24,21 @@
#pragma once
#include "SdcClass.hh"
#include "RiseFallMinMax.hh"
#include "SdcClass.hh"
namespace sta {
class ClockGatingCheck
{
public:
ClockGatingCheck();
RiseFallMinMax *margins() { return &margins_; }
void setActiveValue(LogicValue value);
LogicValue activeValue() const { return active_value_; }
private:
RiseFallMinMax margins_;
LogicValue active_value_;
LogicValue active_value_{LogicValue::unknown};
};
} // namespace
} // namespace sta

View File

@ -26,20 +26,20 @@
#include <string>
#include "SdcCmdComment.hh"
#include "SdcClass.hh"
#include "SdcCmdComment.hh"
namespace sta {
class ClockGroups : public SdcCmdComment
{
public:
ClockGroups(const std::string &name,
ClockGroups(std::string_view name,
bool logically_exclusive,
bool physically_exclusive,
bool asynchronous,
bool allow_paths,
std::string comment);
std::string_view comment);
~ClockGroups();
void makeClockGroup(ClockSet *clks);
const std::string &name() const { return name_; }
@ -59,4 +59,4 @@ private:
ClockGroupSet groups_;
};
} // namespace
} // namespace sta

View File

@ -26,8 +26,8 @@
#include "MinMax.hh"
#include "NetworkClass.hh"
#include "SdcClass.hh"
#include "RiseFallMinMax.hh"
#include "SdcClass.hh"
#include "Transition.hh"
namespace sta {
@ -57,4 +57,4 @@ private:
RiseFallMinMax delays_[EarlyLate::index_count];
};
} // namespace
} // namespace sta

View File

@ -26,9 +26,9 @@
#include "MinMax.hh"
#include "NetworkClass.hh"
#include "Transition.hh"
#include "SdcClass.hh"
#include "RiseFallMinMax.hh"
#include "SdcClass.hh"
#include "Transition.hh"
namespace sta {
@ -61,4 +61,4 @@ private:
RiseFallMinMax delays_;
};
} // namespace
} // namespace sta

View File

@ -25,12 +25,12 @@
#pragma once
#include <functional>
#include <map>
#include <string_view>
#include <vector>
#include <map>
#include "StringUtil.hh"
#include "NetworkClass.hh"
#include "StringUtil.hh"
// The classes defined in this file are a contrete implementation of
// the library API. They can be used by a reader to construct classes
@ -84,8 +84,8 @@ protected:
ObjectId id_;
std::string filename_;
bool is_liberty_;
char bus_brkt_left_;
char bus_brkt_right_;
char bus_brkt_left_{'['};
char bus_brkt_right_{']'};
ConcreteCellMap cell_map_;
private:
@ -127,12 +127,12 @@ public:
ConcretePort *makeBundlePort(std::string_view name,
ConcretePortSeq *members);
// Group previously defined bus bit ports together.
void groupBusPorts(const char bus_brkt_left,
const char bus_brkt_right,
std::function<bool(std::string_view)> port_msb_first);
void groupBusPorts(char bus_brkt_left,
char bus_brkt_right,
const std::function<bool(std::string_view)> &port_msb_first);
size_t portCount() const;
void setName(std::string_view name);
void addPort(ConcretePort *port);
virtual void addPort(ConcretePort *port);
void addPortBit(ConcretePort *port);
protected:
@ -149,7 +149,7 @@ protected:
int from_index,
int to_index);
// Bus port bit (internal to makeBusPortBits).
ConcretePort *makePort(std::string bit_name,
ConcretePort *makePort(std::string_view bit_name,
int bit_index);
void makeBusPortBit(ConcretePort *bus_port,
std::string_view bus_name,
@ -160,14 +160,14 @@ protected:
// Filename is optional.
std::string filename_;
ConcreteLibrary *library_;
LibertyCell *liberty_cell_;
LibertyCell *liberty_cell_{nullptr};
// External application cell.
void *ext_cell_;
void *ext_cell_{nullptr};
// Non-bus and bus ports (but no expanded bus bit ports).
ConcretePortSeq ports_;
ConcretePortMap port_map_;
// Port bit count (expanded buses).
int port_bit_count_;
int port_bit_count_{0};
bool is_leaf_;
AttributeMap attribute_map_;
@ -242,10 +242,10 @@ protected:
ObjectId id_;
ConcreteCell *cell_;
PortDirection *direction_;
LibertyPort *liberty_port_;
LibertyPort *liberty_port_{nullptr};
// External application port.
void *ext_port_;
int pin_index_;
void *ext_port_{nullptr};
int pin_index_{-1};
bool is_bundle_;
bool is_bus_;
int from_index_;
@ -253,7 +253,7 @@ protected:
// Expanded bus bit ports (ordered by from_index_ to to_index_)
// or bundle member ports.
ConcretePortSeq *member_ports_;
ConcretePort *bundle_port_;
ConcretePort *bundle_port_{nullptr};
private:
friend class ConcreteCell;
@ -271,8 +271,8 @@ private:
const ConcretePortSeq &ports_;
ConcretePortSeq::const_iterator port_iter_;
ConcretePortMemberIterator *member_iter_;
ConcretePort *next_;
ConcretePortMemberIterator *member_iter_{nullptr};
ConcretePort *next_{nullptr};
};
} // Namespace
} // namespace sta

View File

@ -25,14 +25,14 @@
#pragma once
#include <functional>
#include <string_view>
#include <vector>
#include <map>
#include <set>
#include <string_view>
#include <vector>
#include "StringUtil.hh"
#include "Network.hh"
#include "LibertyClass.hh"
#include "Network.hh"
#include "StringUtil.hh"
namespace sta {
@ -62,7 +62,7 @@ class ConcreteNetwork : public NetworkReader
{
public:
ConcreteNetwork();
~ConcreteNetwork();
~ConcreteNetwork() override;
void clear() override;
bool linkNetwork(std::string_view top_cell_name,
bool make_black_boxes,
@ -263,6 +263,9 @@ public:
using Network::isLeaf;
protected:
void clearImpl();
void deleteCellNetworkViewsImpl();
void deleteInstanceImpl(Instance *inst);
void addLibrary(ConcreteLibrary *library);
void setName(std::string_view name);
void clearConstantNets();
@ -280,8 +283,8 @@ protected:
// Cell lookup search order sequence.
ConcreteLibrarySeq library_seq_;
ConcreteLibraryMap library_map_;
Instance *top_instance_;
NetSet constant_nets_[2]; // LogicValue::zero/one
Instance *top_instance_{nullptr};
NetSet constant_nets_[2]{NetSet(this), NetSet(this)}; // LogicValue::zero/one
LinkNetworkFunc link_func_;
CellNetworkViewMap cell_network_view_map_;
static ObjectId object_id_;
@ -293,7 +296,7 @@ private:
class ConcreteInstance
{
public:
std::string_view name() const { return name_; }
const std::string &name() const { return name_; }
ObjectId id() const { return id_; }
Cell *cell() const;
ConcreteInstance *parent() const { return parent_; }
@ -332,8 +335,8 @@ protected:
ConcreteInstance *parent_;
// Array of pins indexed by pin->port->index().
ConcretePinSeq pins_;
ConcreteInstanceChildMap *children_;
ConcreteInstanceNetMap *nets_;
ConcreteInstanceChildMap *children_{nullptr};
ConcreteInstanceNetMap *nets_{nullptr};
AttributeMap attribute_map_;
private:
@ -344,7 +347,7 @@ private:
class ConcretePin
{
public:
std::string_view name() const;
const std::string &name() const;
ConcreteInstance *instance() const { return instance_; }
ConcreteNet *net() const { return net_; }
ConcretePort *port() const { return port_; }
@ -354,7 +357,7 @@ public:
void setVertexId(VertexId id);
protected:
~ConcretePin() {}
~ConcretePin() = default;
ConcretePin(ConcreteInstance *instance,
ConcretePort *port,
ConcreteNet *net);
@ -362,12 +365,12 @@ protected:
ConcreteInstance *instance_;
ConcretePort *port_;
ConcreteNet *net_;
ConcreteTerm *term_;
ConcreteTerm *term_{nullptr};
ObjectId id_;
// Doubly linked list of net pins.
ConcretePin *net_next_;
ConcretePin *net_prev_;
VertexId vertex_id_;
ConcretePin *net_next_{nullptr};
ConcretePin *net_prev_{nullptr};
VertexId vertex_id_{vertex_id_null};
private:
friend class ConcreteNetwork;
@ -378,13 +381,13 @@ private:
class ConcreteTerm
{
public:
std::string_view name() const;
const std::string &name() const;
ObjectId id() const { return id_; }
ConcreteNet *net() const { return net_; }
ConcretePin *pin() const { return pin_; }
protected:
~ConcreteTerm() {}
~ConcreteTerm() = default;
ConcreteTerm(ConcretePin *pin,
ConcreteNet *net);
@ -392,7 +395,7 @@ protected:
ConcreteNet *net_;
ObjectId id_;
// Linked list of net terms.
ConcreteTerm *net_next_;
ConcreteTerm *net_next_{nullptr};
private:
friend class ConcreteNetwork;
@ -403,7 +406,7 @@ private:
class ConcreteNet
{
public:
std::string_view name() const { return name_; }
const std::string &name() const { return name_; }
ObjectId id() const { return id_; }
ConcreteInstance *instance() const { return instance_; }
void addPin(ConcretePin *pin);
@ -420,16 +423,16 @@ protected:
ObjectId id_;
ConcreteInstance *instance_;
// Pointer to head of linked list of pins.
ConcretePin *pins_;
ConcretePin *pins_{nullptr};
// Pointer to head of linked list of terminals.
// These terminals correspond to the pins attached to the instance that
// contains this net in the hierarchy level above.
ConcreteTerm *terms_;
ConcreteNet *merged_into_;
ConcreteTerm *terms_{nullptr};
ConcreteNet *merged_into_{nullptr};
friend class ConcreteNetwork;
friend class ConcreteNetTermIterator;
friend class ConcreteNetPinIterator;
};
} // namespace
} // namespace sta

View File

@ -42,7 +42,8 @@ namespace sta {
// 1. Sequence containers (vector<T*>, list<T*>, deque<T*>, …)
// ------------------------------------------------------------
template <typename Container>
std::enable_if_t<std::is_pointer_v<typename Container::value_type>>
requires std::is_pointer_v<typename Container::value_type>
void
deleteContents(Container& c)
{
for (auto ptr : c)
@ -51,7 +52,8 @@ deleteContents(Container& c)
}
template <typename Container>
std::enable_if_t<std::is_pointer_v<typename Container::value_type>>
requires std::is_pointer_v<typename Container::value_type>
void
deleteContents(Container *c)
{
for (auto ptr : *c)
@ -63,8 +65,8 @@ deleteContents(Container *c)
// 2. Maps (map<K, T*>, unordered_map<K, T*>)
// ------------------------------------------------------------
template <typename Map>
std::enable_if_t<std::is_pointer_v<typename Map::mapped_type>
>
requires std::is_pointer_v<typename Map::mapped_type>
void
deleteContents(Map& m)
{
for (auto& kv : m)
@ -73,8 +75,8 @@ deleteContents(Map& m)
}
template <typename Map>
std::enable_if_t<std::is_pointer_v<typename Map::mapped_type>
>
requires std::is_pointer_v<typename Map::mapped_type>
void
deleteContents(Map *m)
{
for (auto& kv : *m)
@ -86,10 +88,10 @@ deleteContents(Map *m)
// 3. Sets (set<T*>, unordered_set<T*>)
// ------------------------------------------------------------
template <typename Set>
std::enable_if_t<
std::is_pointer_v<typename Set::value_type> &&
!std::is_same_v<typename Set::value_type, typename Set::mapped_type>
>
requires (std::is_pointer_v<typename Set::value_type> &&
requires { typename Set::mapped_type; } &&
!std::is_same_v<typename Set::value_type, typename Set::mapped_type>)
void
deleteContents(Set& s)
{
for (auto ptr : s)
@ -119,28 +121,28 @@ struct find_return;
template<typename C>
struct find_return<C*, true>
{
using type = typename C::mapped_type;
using type = C::mapped_type;
};
// pointer to set
template<typename C>
struct find_return<C*, false>
{
using type = typename C::key_type;
using type = C::key_type;
};
// map ref
template<typename C>
struct find_return<C, true>
{
using type = typename C::mapped_type;
using type = C::mapped_type;
};
// set ref
template<typename C>
struct find_return<C, false>
{
using type = typename C::key_type;
using type = C::key_type;
};
@ -149,10 +151,10 @@ struct find_return<C, false>
template<typename AssocContainer>
auto
findKey(const AssocContainer& c,
typename AssocContainer::key_type key)
-> typename find_return<AssocContainer>::type
const typename AssocContainer::key_type& key)
-> find_return<AssocContainer>::type
{
using ReturnType = typename find_return<AssocContainer>::type;
using ReturnType = find_return<AssocContainer>::type;
static_assert(std::is_pointer_v<ReturnType>,
"findKey requires pointer types");
@ -173,9 +175,9 @@ template<typename AssocContainer>
auto
findStringKey(const AssocContainer& c,
std::string_view key)
-> typename find_return<AssocContainer>::type
-> find_return<AssocContainer>::type
{
using ReturnType = typename find_return<AssocContainer>::type;
using ReturnType = find_return<AssocContainer>::type;
static_assert(std::is_pointer_v<ReturnType>,
"findStringKey requires pointer types");
@ -194,8 +196,8 @@ findStringKey(const AssocContainer& c,
template<typename AssocContainer>
auto
findKeyValue(const AssocContainer& c,
typename AssocContainer::key_type key)
-> const typename find_return<AssocContainer>::type &
const typename AssocContainer::key_type& key)
-> const find_return<AssocContainer>::type &
{
auto it = c.find(key);
if (it != c.end()) {
@ -213,7 +215,7 @@ findKeyValue(const AssocContainer& c,
template<typename AssocContainer>
void
findKeyValue(const AssocContainer& c,
typename AssocContainer::key_type key,
const typename AssocContainer::key_type& key,
typename find_return<AssocContainer>::type &value,
bool &exists)
{
@ -240,7 +242,7 @@ findKeyValue(const AssocContainer& c,
template<typename AssocContainer>
void
findKeyValue(const AssocContainer *c,
typename AssocContainer::key_type key,
const typename AssocContainer::key_type& key,
typename find_return<AssocContainer>::type &value,
bool &exists)
{
@ -269,8 +271,8 @@ findKeyValue(const AssocContainer *c,
template<typename AssocContainer>
auto
findKeyValuePtr(AssocContainer& c,
typename AssocContainer::key_type key)
-> typename find_return<AssocContainer>::type*
const typename AssocContainer::key_type& key)
-> find_return<AssocContainer>::type*
{
auto it = c.find(key);
if (it == c.end())
@ -289,8 +291,8 @@ findKeyValuePtr(AssocContainer& c,
template<typename AssocContainer>
auto
findKeyValuePtr(const AssocContainer& c,
typename AssocContainer::key_type key)
-> typename find_return<AssocContainer>::type const*
const typename AssocContainer::key_type& key)
-> find_return<AssocContainer>::type const*
{
auto it = c.find(key);
if (it == c.end())
@ -310,8 +312,8 @@ findKeyValuePtr(const AssocContainer& c,
template<typename AssocContainer>
auto
findStringValuePtr(AssocContainer& c,
std::string_view key)
-> typename find_return<AssocContainer>::type*
std::string_view key)
-> find_return<AssocContainer>::type*
{
auto it = c.find(key);
if (it == c.end())
@ -326,8 +328,8 @@ findStringValuePtr(AssocContainer& c,
template<typename AssocContainer>
auto
findStringValuePtr(const AssocContainer& c,
std::string_view key)
-> typename find_return<AssocContainer>::type const*
std::string_view key)
-> find_return<AssocContainer>::type const*
{
auto it = c.find(key);
if (it == c.end())
@ -435,7 +437,7 @@ requires std::predicate<Comp&,
std::ranges::range_reference_t<Range>>
void
sort(Range& r,
Comp comp = Comp{})
const Comp &comp = Comp{})
{
std::stable_sort(std::ranges::begin(r), std::ranges::end(r), comp);
}
@ -450,9 +452,9 @@ requires std::ranges::random_access_range<Range> &&
std::ranges::range_reference_t<Range>>
void
sort(Range* r,
Comp comp = Comp{})
const Comp &comp = Comp{})
{
std::stable_sort(std::ranges::begin(*r), std::ranges::end(*r), comp);
}
} // namespace
} // namespace sta

View File

@ -27,9 +27,9 @@
#include <unordered_set>
#include "MinMax.hh"
#include "TimingRole.hh"
#include "StaState.hh"
#include "SdcClass.hh"
#include "StaState.hh"
#include "TimingRole.hh"
namespace sta {
@ -127,7 +127,7 @@ private:
int src_cycle_[TimingRole::index_max + 1];
// Target clock cycle offset.
int tgt_cycle_[TimingRole::index_max + 1];
bool max_cycles_exceeded_;
bool max_cycles_exceeded_{false};
};
} // namespace
} // namespace sta

View File

@ -24,12 +24,12 @@
#pragma once
#include "MinMax.hh"
#include "LibertyClass.hh"
#include "MinMax.hh"
#include "NetworkClass.hh"
#include "NetworkCmp.hh"
#include "SdcClass.hh"
#include "RiseFallMinMax.hh"
#include "SdcClass.hh"
namespace sta {
@ -79,4 +79,4 @@ private:
const Network *network_;
};
} // namespace
} // namespace sta

View File

@ -24,10 +24,10 @@
#pragma once
#include <string>
#include <string_view>
#include <map>
#include <mutex>
#include <string>
#include <string_view>
#include "Format.hh"
#include "Report.hh"
@ -64,9 +64,9 @@ public:
protected:
Report *report_;
std::mutex buffer_lock_;
bool debug_on_;
bool debug_on_{false};
DebugMap debug_map_;
int stats_level_;
int stats_level_{0};
};
// Inlining a varargs function would eval the args, which can
@ -76,4 +76,4 @@ protected:
debug->report(what, fmt __VA_OPT__(,) __VA_ARGS__); \
}
} // namespace
} // namespace sta

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@ -27,8 +27,8 @@
#include <array>
#include <cstddef>
#include "StaConfig.hh"
#include "MinMax.hh"
#include "StaConfig.hh"
namespace sta {
@ -37,16 +37,16 @@ class StaState;
class Delay
{
public:
Delay();
Delay(float mean);
Delay() noexcept;
Delay(float mean) noexcept;
Delay(float mean,
// std_dev^2
float std_dev2);
float std_dev2) noexcept;
Delay(float mean,
float mean_shift,
// std_dev^2
float std_dev2,
float skewness);
float skewness) noexcept;
void setValues(float mean,
float mean_shift,
float std_dev2,
@ -62,7 +62,7 @@ public:
float skewness() const { return values_[3]; }
void setSkewness(float skewness);
void operator=(float delay);
Delay &operator=(float delay);
// This allows applications that do not support statistical timing
// to treat Delays as floats without explicitly converting with
// delayAsFloat.
@ -77,8 +77,8 @@ private:
class DelayDbl
{
public:
DelayDbl();
DelayDbl(double value);
DelayDbl() noexcept;
DelayDbl(double mean) noexcept;
double mean() const { return values_[0]; }
void setMean(double mean);
double meanShift() const { return values_[1]; }
@ -91,7 +91,7 @@ public:
double std_dev2,
double skewnes);
void operator=(double delay);
DelayDbl &operator=(double delay);
private:
std::array<double, 4> values_;
@ -108,7 +108,7 @@ const Delay delay_zero(0.0);
class DelayOps
{
public:
virtual ~DelayOps() {}
virtual ~DelayOps() = default;
virtual float stdDev2(const Delay &delay,
const EarlyLate *early_late) const = 0;
virtual float asFloat(const Delay &delay,
@ -356,4 +356,4 @@ Delay
delayRemove(const Delay &delay1,
const Delay &delay2);
} // namespace
} // namespace sta

View File

@ -55,4 +55,4 @@ ArcDelayCalc *
makeDelayCalc(std::string_view name,
StaState *sta);
} // namespace
} // namespace sta

View File

@ -1,5 +1,5 @@
// OpenSTA, Static Timing Analyzer
// Copyright (c) 2025, Parallax Software, Inc.
// Copyright (c) 2026, Parallax Software, Inc.
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
@ -87,4 +87,4 @@ public:
const StaState *sta) const override;
};
} // namespace
} // namespace sta

View File

@ -1,5 +1,5 @@
// OpenSTA, Static Timing Analyzer
// Copyright (c) 2025, Parallax Software, Inc.
// Copyright (c) 2026, Parallax Software, Inc.
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
@ -87,4 +87,4 @@ public:
const StaState *sta) const override;
};
} // namespace
} // namespace sta

View File

@ -1,5 +1,5 @@
// OpenSTA, Static Timing Analyzer
// Copyright (c) 2025, Parallax Software, Inc.
// Copyright (c) 2026, Parallax Software, Inc.
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
@ -95,4 +95,4 @@ private:
double skewness2) const;
};
} // namespace
} // namespace sta

View File

@ -24,10 +24,10 @@
#pragma once
#include "MinMax.hh"
#include "LibertyClass.hh"
#include "SdcClass.hh"
#include "MinMax.hh"
#include "RiseFallMinMax.hh"
#include "SdcClass.hh"
namespace sta {
@ -111,10 +111,4 @@ private:
DeratingFactors factors_[timing_derate_cell_type_count];
};
class DeratingFactorsNet : public DeratingFactors
{
public:
DeratingFactorsNet();
};
} // namespace
} // namespace sta

View File

@ -27,8 +27,8 @@
#include <set>
#include <vector>
#include "NetworkClass.hh"
#include "LibertyClass.hh"
#include "NetworkClass.hh"
#include "SdcClass.hh"
namespace sta {
@ -46,7 +46,6 @@ using TimingArcSetSet = std::set<TimingArcSet*, TimingArcSetLess>;
class DisabledPorts
{
public:
DisabledPorts();
~DisabledPorts();
void setDisabledAll();
void removeDisabledAll();
@ -67,10 +66,10 @@ public:
[[nodiscard]] bool all() const { return all_; }
private:
bool all_;
LibertyPortSet *from_;
LibertyPortSet *to_;
LibertyPortPairSet *from_to_;
bool all_{false};
LibertyPortSet *from_{nullptr};
LibertyPortSet *to_{nullptr};
LibertyPortPairSet *from_to_{nullptr};
};
// set_disable_timing cell [-from] [-to]
@ -89,7 +88,7 @@ public:
private:
LibertyCell *cell_;
TimingArcSetSet *arc_sets_;
TimingArcSetSet *arc_sets_{nullptr};
};
// set_disable_timing instance [-from] [-to]
@ -111,4 +110,4 @@ sortByPathName(const DisabledInstancePortsMap *inst_map,
LibertyPortPairSeq
sortByName(const LibertyPortPairSet *set);
} // namespace
} // namespace sta

View File

@ -5,23 +5,23 @@
#pragma once
#include <thread>
#include <functional>
#include <vector>
#include <cstdint>
#include <queue>
#include <mutex>
#include <condition_variable>
#include <atomic>
#include <condition_variable>
#include <cstdint>
#include <functional>
#include <mutex>
#include <queue>
#include <thread>
#include <vector>
namespace sta {
class DispatchQueue
{
typedef std::function<void(int thread)> fp_t;
using fp_t = std::function<void(int thread)>;
public:
DispatchQueue(size_t thread_cnt);
DispatchQueue(size_t thread_count);
~DispatchQueue();
void setThreadCount(size_t thread_count);
size_t getThreadCount() const;
@ -49,4 +49,4 @@ private:
bool quit_ = false;
};
} // namespace
} // namespace sta

View File

@ -34,7 +34,8 @@ template <class ENUM>
class EnumNameMap
{
public:
EnumNameMap(std::initializer_list<std::pair<const ENUM, std::string>> enum_names);
EnumNameMap(std::initializer_list<std::pair<const ENUM,
std::string>> enum_names) noexcept;
const std::string &find(ENUM key) const;
ENUM find(std::string_view name,
ENUM unknown_key) const;
@ -49,7 +50,7 @@ private:
};
template <class ENUM>
EnumNameMap<ENUM>::EnumNameMap(std::initializer_list<std::pair<const ENUM,std::string>> enum_names) :
EnumNameMap<ENUM>::EnumNameMap(std::initializer_list<std::pair<const ENUM,std::string>> enum_names) noexcept :
enum_map_(enum_names)
{
for (const auto& [key, name] : enum_map_)
@ -97,4 +98,4 @@ EnumNameMap<ENUM>::find(std::string_view name,
return unknown_key;
}
} // namespace
} // namespace sta

View File

@ -87,4 +87,4 @@ bool
equivCellSequentials(const LibertyCell *cell1,
const LibertyCell *cell2);
} // namespace
} // namespace sta

View File

@ -35,8 +35,6 @@ namespace sta {
class Exception : public std::exception
{
public:
Exception();
virtual ~Exception() {}
const char *what() const noexcept override = 0;
};
@ -44,7 +42,7 @@ class ExceptionMsg : public Exception
{
public:
ExceptionMsg(const std::string &msg,
const bool suppressed);
bool suppressed);
const char *what() const noexcept override;
bool suppressed() const { return suppressed_; }
@ -93,4 +91,4 @@ protected:
#define criticalError(id, msg) \
Report::defaultReport()->fileCritical(id, __FILE__, __LINE__, msg)
} // namespace
} // namespace sta

View File

@ -29,8 +29,8 @@
#include <vector>
#include "Error.hh"
#include "SdcCmdComment.hh"
#include "SdcClass.hh"
#include "SdcCmdComment.hh"
namespace sta {
@ -70,6 +70,7 @@ public:
virtual bool isFilter() const { return false; }
virtual ExceptionPathType type() const = 0;
virtual std::string to_string(const Network *network) const;
virtual std::string_view typeString() const = 0;
ExceptionFrom *from() const { return from_; }
ExceptionThruSeq *thrus() const { return thrus_; }
ExceptionTo *to() const { return to_; }
@ -135,7 +136,6 @@ public:
virtual bool breakPath() const { return false; }
protected:
virtual const char *typeString() const = 0;
std::string fromThruToString(const Network *network) const;
void makeStates();
@ -145,7 +145,7 @@ protected:
const MinMaxAll *min_max_;
bool own_pts_;
int priority_;
size_t id_; // Unique ID assigned by Sdc.
size_t id_{0}; // Unique ID assigned by Sdc.
ExceptionState *states_;
};
@ -172,7 +172,7 @@ public:
bool own_pts) override;
bool isFalse() const override { return true; }
ExceptionPathType type() const override { return ExceptionPathType::false_path; }
const char *typeString() const override;
std::string_view typeString() const override;
bool mergeable(ExceptionPath *exception) const override;
bool overrides(ExceptionPath *exception) const override;
int typePriority() const override;
@ -188,7 +188,7 @@ public:
bool own_pts);
bool isLoop() const override { return true; }
ExceptionPathType type() const override { return ExceptionPathType::loop; }
const char *typeString() const override;
std::string_view typeString() const override;
bool mergeable(ExceptionPath *exception) const override;
};
@ -212,7 +212,7 @@ public:
bool isPathDelay() const override { return true; }
ExceptionPathType type() const override { return ExceptionPathType::path_delay; }
std::string to_string(const Network *network) const override;
const char *typeString() const override;
std::string_view typeString() const override;
bool mergeable(ExceptionPath *exception) const override;
bool overrides(ExceptionPath *exception) const override;
float delay() const override { return delay_; }
@ -248,7 +248,7 @@ public:
bool matches(const MinMax *min_max,
bool exactly) const override;
std::string to_string(const Network *network) const override;
const char *typeString() const override;
std::string_view typeString() const override;
bool mergeable(ExceptionPath *exception) const override;
bool overrides(ExceptionPath *exception) const override;
bool useEndClk() const override { return use_end_clk_; }
@ -279,7 +279,7 @@ public:
bool own_pts) override;
bool isFilter() const override { return true; }
ExceptionPathType type() const override { return ExceptionPathType::filter; }
const char *typeString() const override;
std::string_view typeString() const override;
bool mergeable(ExceptionPath *exception) const override;
bool overrides(ExceptionPath *exception) const override;
bool resetMatch(ExceptionFrom *from,
@ -301,14 +301,13 @@ public:
ExceptionTo *to,
bool own_pts,
std::string_view comment);
~GroupPath() override;
ExceptionPath *clone(ExceptionFrom *from,
ExceptionThruSeq *thrus,
ExceptionTo *to,
bool own_pts) override;
bool isGroupPath() const override { return true; }
ExceptionPathType type() const override { return ExceptionPathType::group_path; }
const char *typeString() const override;
std::string_view typeString() const override;
bool mergeable(ExceptionPath *exception) const override;
bool overrides(ExceptionPath *exception) const override;
int typePriority() const override;
@ -327,7 +326,7 @@ class ExceptionPt
public:
ExceptionPt(const RiseFallBoth *rf,
bool own_pts);
virtual ~ExceptionPt() {};
virtual ~ExceptionPt() = default;
virtual bool isFrom() const { return false; }
virtual bool isThru() const { return false; }
virtual bool isTo() const { return false; }
@ -367,7 +366,7 @@ protected:
bool own_pts_;
// Hash is cached because there may be many objects to speed up
// exception merging.
size_t hash_;
size_t hash_{0};
// Maximum number of objects for to_string() to show.
static const int to_string_max_objects_;
@ -386,7 +385,7 @@ public:
const RiseFallBoth *rf,
bool own_pts,
const Network *network);
~ExceptionFromTo();
~ExceptionFromTo() override;
PinSet *pins() override { return pins_; }
bool hasPins() const;
ClockSet *clks() override { return clks_; }
@ -512,7 +511,7 @@ public:
const RiseFallBoth *rf,
bool own_pts,
const Network *network);
~ExceptionThru();
~ExceptionThru() override;
ExceptionThru *clone(const Network *network);
std::string to_string(const Network *network) const override;
bool isThru() const override { return true; }
@ -538,15 +537,6 @@ public:
const Network *network) const;
int typePriority() const override { return 2; }
size_t objectCount() const override;
void connectPinAfter(PinSet *drvrs,
Network *network) override;
void deletePinBefore(const Pin *pin,
Network *network) override;
void deleteInstance(const Instance *inst,
const Network *network);
protected:
void findHash(const Network *network);
void addPin(const Pin *pin,
const Network *network) override;
void addEdge(const EdgePins &edge,
@ -556,6 +546,15 @@ protected:
void addInstance(const Instance *inst,
const Network *network) override;
void addClock(Clock *) override {}
void connectPinAfter(PinSet *drvrs,
Network *network) override;
void deletePinBefore(const Pin *pin,
Network *network) override;
void deleteInstance(const Instance *inst,
const Network *network);
protected:
void findHash(const Network *network);
void deletePin(const Pin *pin,
const Network *network);
void deleteEdge(const EdgePins &edge);
@ -583,7 +582,7 @@ protected:
// Leaf/port pins.
PinSet *pins_;
// Graph edges that traverse thru hierarchical pins.
EdgePinsSet *edges_;
EdgePinsSet *edges_{nullptr};
NetSet *nets_;
InstanceSet *insts_;
};
@ -602,9 +601,9 @@ public:
private:
const ExceptionPath *exception_;
bool from_done_;
bool from_done_{false};
ExceptionThruSeq::iterator thru_iter_;
bool to_done_;
bool to_done_{false};
};
// Visitor for exception point sets expanded into single object paths.
@ -620,7 +619,6 @@ class ExpandedExceptionVisitor
public:
ExpandedExceptionVisitor(ExceptionPath *exception,
const Network *network);
virtual ~ExpandedExceptionVisitor() {}
void visitExpansions();
// From/thrus/to have a single exception point (pin/instance/net/clock).
virtual void visit(ExceptionFrom *from,
@ -666,7 +664,7 @@ public:
private:
ExceptionPath *exception_;
ExceptionThru *next_thru_;
ExceptionState *next_state_;
ExceptionState *next_state_{nullptr};
int index_;
};
@ -678,7 +676,7 @@ exceptionStateCmp(const ExceptionState *state1,
class EmptyExpceptionPt : public Exception
{
public:
virtual const char *what() const noexcept;
const char *what() const noexcept override;
};
class ExceptionPathLess
@ -698,4 +696,4 @@ checkFromThrusTo(ExceptionFrom *from,
ExceptionThruSeq *thrus,
ExceptionTo *to);
} // namespace
} // namespace sta

View File

@ -1,5 +1,5 @@
// OpenSTA, Static Timing Analyzer
// Copyright (c) 2025, Parallax Software, Inc.
// Copyright (c) 2026, Parallax Software, Inc.
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
@ -28,6 +28,7 @@
#include <string_view>
#include <vector>
#include "GraphClass.hh"
#include "NetworkClass.hh"
#include "SdcClass.hh"
#include "SearchClass.hh"
@ -40,52 +41,52 @@ class Report;
PortSeq
filterPorts(std::string_view filter_expression,
PortSeq *objects,
PortSeq *ports,
Sta *sta);
InstanceSeq
filterInstances(std::string_view filter_expression,
InstanceSeq *objects,
InstanceSeq *insts,
Sta *sta);
PinSeq
filterPins(std::string_view filter_expression,
PinSeq *objects,
PinSeq *pins,
Sta *sta);
NetSeq
filterNets(std::string_view filter_expression,
NetSeq *objects,
NetSeq *nets,
Sta *sta);
ClockSeq
filterClocks(std::string_view filter_expression,
ClockSeq *objects,
ClockSeq *clks,
Sta *sta);
LibertyCellSeq
filterLibCells(std::string_view filter_expression,
LibertyCellSeq *objects,
LibertyCellSeq *cells,
Sta *sta);
LibertyPortSeq
filterLibPins(std::string_view filter_expression,
LibertyPortSeq *objects,
LibertyPortSeq *ports,
Sta *sta);
LibertyLibrarySeq
filterLibertyLibraries(std::string_view filter_expression,
LibertyLibrarySeq *objects,
LibertyLibrarySeq *libs,
Sta *sta);
EdgeSeq
filterTimingArcs(std::string_view filter_expression,
EdgeSeq *objects,
EdgeSeq *edges,
Sta *sta);
PathEndSeq
filterPathEnds(std::string_view filter_expression,
PathEndSeq *objects,
PathEndSeq *ends,
Sta *sta);
// For FilterExpr unit tests.
@ -93,4 +94,4 @@ StringSeq
filterExprToPostfix(std::string_view expr,
Report *report);
} // namespace
} // namespace sta

View File

@ -26,8 +26,8 @@
#include <string>
#include "NetworkClass.hh"
#include "LibertyClass.hh"
#include "NetworkClass.hh"
namespace sta {
@ -105,4 +105,4 @@ private:
FuncExpr *
funcExprNot(FuncExpr *expr);
} // namespace
} // namespace sta

View File

@ -48,4 +48,4 @@ fuzzyGreaterEqual(float v1,
bool
fuzzyInf(float value);
} // namespace
} // namespace sta

View File

@ -24,19 +24,19 @@
#pragma once
#include <mutex>
#include <atomic>
#include <map>
#include <mutex>
#include "Iterator.hh"
#include "ObjectTable.hh"
#include "LibertyClass.hh"
#include "NetworkClass.hh"
#include "Delay.hh"
#include "GraphClass.hh"
#include "VertexId.hh"
#include "Iterator.hh"
#include "LibertyClass.hh"
#include "NetworkClass.hh"
#include "ObjectTable.hh"
#include "Path.hh"
#include "StaState.hh"
#include "VertexId.hh"
namespace sta {
@ -61,7 +61,7 @@ public:
Graph(StaState *sta,
DcalcAPIndex ap_count);
void makeGraph();
~Graph();
~Graph() override;
// Number of arc delays and slews from sdf or delay calculation.
void setDelayCount(DcalcAPIndex ap_count);
@ -102,7 +102,7 @@ public:
const Slew &slew);
// Edge functions.
Edge *edge(EdgeId edge_index) const;
Edge *edge(EdgeId edge_id) const;
EdgeId id(const Edge *edge) const;
Edge *makeEdge(Vertex *from,
Vertex *to,
@ -211,8 +211,8 @@ protected:
void initArcDelays(Edge *edge);
void removeDelayAnnotated(Edge *edge);
VertexTable *vertices_;
EdgeTable *edges_;
VertexTable *vertices_{nullptr};
EdgeTable *edges_{nullptr};
// Bidirect pins are split into two vertices:
// load/sink (top level output, instance pin input) vertex in pin_vertex_map
// driver/source (top level input, instance pin output) vertex
@ -291,8 +291,8 @@ protected:
bool is_bidirect_drvr,
bool is_reg_clk);
void clear();
Slew *slews() { return std::bit_cast<Slew*>(slews_); }
const Slew *slews() const { return std::bit_cast<const Slew*>(slews_); }
Slew *slews() { return reinterpret_cast<Slew*>(slews_); }
const Slew *slews() const { return reinterpret_cast<const Slew*>(slews_); }
float *slewsFloat() { return slews_; }
const float *slewsFloat() const { return slews_; }
void setSlews(float *slews);
@ -436,9 +436,9 @@ private:
Network *network_;
Instance *top_inst_;
LeafInstanceIterator *inst_iter_;
InstancePinIterator *pin_iter_;
Vertex *vertex_;
Vertex *bidir_vertex_;
InstancePinIterator *pin_iter_{nullptr};
Vertex *vertex_{nullptr};
Vertex *bidir_vertex_{nullptr};
};
class VertexInEdgeIterator : public VertexEdgeIterator
@ -491,4 +491,4 @@ makeVertexSet(StaState *sta)
return VertexSet(VertexIdLess(sta->graphRef()));
}
} // namespace
} // namespace sta

View File

@ -25,13 +25,13 @@
#pragma once
#include <limits>
#include <vector>
#include <set>
#include <vector>
#include "ObjectId.hh"
#include "MinMax.hh"
#include "Transition.hh"
#include "Delay.hh"
#include "MinMax.hh"
#include "ObjectId.hh"
#include "Transition.hh"
namespace sta {
@ -76,4 +76,4 @@ static constexpr int slew_annotated_bits = MinMax::index_count * RiseFall::index
// Bit shifts used to mark vertices in a Bfs queue.
enum class BfsIndex { dcalc, arrival, required, other, bits };
} // namespace
} // namespace sta

View File

@ -24,9 +24,9 @@
#pragma once
#include "GraphClass.hh"
#include "NetworkClass.hh"
#include "NetworkCmp.hh"
#include "GraphClass.hh"
namespace sta {
@ -59,4 +59,4 @@ sortEdges(EdgeSeq *edges,
Network *network,
Graph *graph);
} // namespace
} // namespace sta

View File

@ -25,16 +25,16 @@
#pragma once
#include <array>
#include <vector>
#include <map>
#include <mutex>
#include <vector>
#include "NetworkClass.hh"
#include "GraphClass.hh"
#include "SearchClass.hh"
#include "SdcClass.hh"
#include "StaState.hh"
#include "ArcDelayCalc.hh"
#include "GraphClass.hh"
#include "NetworkClass.hh"
#include "SdcClass.hh"
#include "SearchClass.hh"
#include "StaState.hh"
namespace sta {
@ -53,8 +53,8 @@ class GraphDelayCalc : public StaState
{
public:
GraphDelayCalc(StaState *sta);
virtual ~GraphDelayCalc();
virtual void copyState(const StaState *sta);
~GraphDelayCalc() override;
void copyState(const StaState *sta) override;
// Set the observer for edge delay changes.
virtual void setObserver(DelayCalcObserver *observer);
// Invalidate all delays/slews.
@ -104,7 +104,7 @@ public:
float &pin_cap,
float &wire_cap,
float &fanout,
bool &has_set_load) const;
bool &has_net_load) const;
void parasiticLoad(const Pin *drvr_pin,
const RiseFall *rf,
const Scene *scene,
@ -171,7 +171,7 @@ protected:
Vertex *drvr_vertex,
const RiseFall *rf,
const LibertyPort *from_port,
float *from_slews,
const DriveCellSlews *from_slews,
const LibertyPort *to_port,
const Scene *scene,
const MinMax *min_max,
@ -191,7 +191,7 @@ protected:
ArcDelayCalc *arc_delay_calc,
LoadPinIndexMap &load_pin_index_map);
MultiDrvrNet *multiDrvrNet(const Vertex *drvr_vertex) const;
MultiDrvrNet *findMultiDrvrNet(Vertex *drvr_pin);
MultiDrvrNet *findMultiDrvrNet(Vertex *drvr_vertex);
MultiDrvrNet *makeMultiDrvrNet(Vertex *drvr_vertex);
bool hasMultiDrvrs(Vertex *drvr_vertex);
Vertex *firstLoad(Vertex *drvr_vertex);
@ -235,7 +235,7 @@ protected:
ArcDelayCalc *arc_delay_calc,
bool propagate);
DrvrLoadSlews loadSlews(LoadPinIndexMap &load_pin_index_map);
bool loadSlewsChanged(DrvrLoadSlews &prev_load_slews,
bool loadSlewsChanged(DrvrLoadSlews &load_slews_prev,
LoadPinIndexMap &load_pin_index_map);
void enqueueTimingChecksEdges(Vertex *vertex);
bool annotateDelaysSlews(Edge *edge,
@ -294,10 +294,10 @@ protected:
bool &has_net_load) const;
// Observer for edge delay changes.
DelayCalcObserver *observer_;
bool delays_seeded_;
bool incremental_;
bool delays_exist_;
DelayCalcObserver *observer_{nullptr};
bool delays_seeded_{false};
bool incremental_{false};
bool delays_exist_{false};
// Vertices with invalid -to delays.
VertexSet invalid_delays_;
// Timing check edges with invalid delays.
@ -313,7 +313,7 @@ protected:
std::mutex multi_drvr_lock_;
// Percentage (0.0:1.0) change in delay that causes downstream
// delays to be recomputed during incremental delay calculation.
float incremental_delay_tolerance_;
float incremental_delay_tolerance_{0.0};
friend class FindVertexDelays;
friend class MultiDrvrNet;
@ -323,8 +323,7 @@ protected:
class DelayCalcObserver
{
public:
DelayCalcObserver() {}
virtual ~DelayCalcObserver() {}
virtual ~DelayCalcObserver() = default;
virtual void delayChangedFrom(Vertex *vertex) = 0;
virtual void delayChangedTo(Vertex *vertex) = 0;
virtual void checkDelayChangedTo(Vertex *vertex) = 0;
@ -335,7 +334,6 @@ public:
class MultiDrvrNet
{
public:
MultiDrvrNet();
VertexSeq &drvrs() { return drvrs_; }
const VertexSeq &drvrs() const { return drvrs_; }
bool parallelGates(const Network *network) const;
@ -353,10 +351,10 @@ public:
private:
// Driver that triggers delay calculation for all the drivers on the net.
Vertex *dcalc_drvr_;
Vertex *dcalc_drvr_{nullptr};
VertexSeq drvrs_;
// [drvr_rf->index][dcalc_ap->index]
std::vector<NetCaps> net_caps_;
};
} // namespace
} // namespace sta

View File

@ -24,8 +24,8 @@
#pragma once
#include <cstdint>
#include <cstddef>
#include <cstdint>
#include <string_view>
namespace sta {
@ -67,4 +67,4 @@ hashString(std::string_view str);
#define hashPtr(ptr) (reinterpret_cast<intptr_t>(ptr) >> 2)
#endif
} // namespace
} // namespace sta

View File

@ -47,8 +47,7 @@ public:
class HpinDrvrLoadVisitor
{
public:
HpinDrvrLoadVisitor() {}
virtual ~HpinDrvrLoadVisitor() {}
virtual ~HpinDrvrLoadVisitor() = default;
virtual void visit(HpinDrvrLoad *drvr_load) = 0;
};
@ -76,4 +75,4 @@ private:
PinSet *hpins_to_load_;
};
} // namespace
} // namespace sta

View File

@ -24,10 +24,11 @@
#pragma once
#include "MinMax.hh"
#include "LibertyClass.hh"
#include "MinMax.hh"
#include "NetworkClass.hh"
#include "RiseFallMinMax.hh"
#include "SdcClass.hh"
namespace sta {
@ -58,7 +59,7 @@ public:
void setDriveCell(const LibertyLibrary *library,
const LibertyCell *cell,
const LibertyPort *from_port,
float *from_slews,
const DriveCellSlews &from_slews,
const LibertyPort *to_port,
const RiseFallBoth *rf,
const MinMaxAll *min_max);
@ -67,7 +68,7 @@ public:
// Return values.
const LibertyCell *&cell,
const LibertyPort *&from_port,
float *&from_slews,
const DriveCellSlews *&from_slews,
const LibertyPort *&to_port) const;
InputDriveCell *driveCell(const RiseFall *rf,
const MinMax *min_max) const;
@ -94,7 +95,7 @@ public:
InputDriveCell(const LibertyLibrary *library,
const LibertyCell *cell,
const LibertyPort *from_port,
float *from_slews,
const DriveCellSlews &from_slews,
const LibertyPort *to_port);
const LibertyLibrary *library() const { return library_; }
void setLibrary(const LibertyLibrary *library);
@ -102,8 +103,8 @@ public:
void setCell(const LibertyCell *cell);
const LibertyPort *fromPort() const { return from_port_; }
void setFromPort(const LibertyPort *from_port);
float *fromSlews() { return from_slews_; }
void setFromSlews(float *from_slews);
const DriveCellSlews &fromSlews() const { return from_slews_; }
void setFromSlews(const DriveCellSlews &from_slews);
const LibertyPort *toPort() const { return to_port_; }
void setToPort(const LibertyPort *to_port);
bool equal(const InputDriveCell *drive) const;
@ -112,8 +113,8 @@ private:
const LibertyLibrary *library_;
const LibertyCell *cell_;
const LibertyPort *from_port_;
float from_slews_[RiseFall::index_count];
DriveCellSlews from_slews_;
const LibertyPort *to_port_;
};
} // namespace
} // namespace sta

View File

@ -94,4 +94,4 @@ protected:
InternalPowerModels models_;
};
} // namespace
} // namespace sta

View File

@ -35,7 +35,7 @@ template <class OBJ>
class Iterator
{
public:
virtual ~Iterator() {}
virtual ~Iterator() = default;
virtual bool hasNext() = 0;
virtual OBJ next() = 0;
};
@ -116,4 +116,4 @@ protected:
SET_TYPE::const_iterator itr_;
};
} // namespace
} // namespace sta

View File

@ -50,4 +50,4 @@ protected:
float power_;
};
} // namespace
} // namespace sta

View File

@ -80,7 +80,7 @@ public:
private:
std::string value_;
FuncExpr *cond_;
FuncExpr *cond_{nullptr};
std::string sdf_cond_;
};
@ -159,10 +159,10 @@ enum class PwrGndType { none,
deepnwell, deeppwell};
enum class ScaleFactorPvt { process, volt, temp, unknown };
constexpr int scale_factor_pvt_count = int(ScaleFactorPvt::unknown) + 1;
constexpr int scale_factor_pvt_count = static_cast<int>(ScaleFactorPvt::unknown) + 1;
enum class TableTemplateType { delay, power, output_current, capacitance, ocv };
constexpr int table_template_type_count = int(TableTemplateType::ocv) + 1;
constexpr int table_template_type_count = static_cast<int>(TableTemplateType::ocv) + 1;
enum class LevelShifterType { HL, LH, HL_LH };
@ -206,7 +206,7 @@ class LibertyLibrary : public ConcreteLibrary
public:
LibertyLibrary(std::string_view name,
std::string_view filename);
virtual ~LibertyLibrary();
~LibertyLibrary() override;
LibertyCell *findLibertyCell(std::string_view name) const;
LibertyCellSeq findLibertyCellsMatching(PatternMatch *pattern);
// Liberty cells that are buffers.
@ -269,7 +269,7 @@ public:
void defaultIntrinsic(const RiseFall *rf,
// Return values.
float &intrisic,
float &intrinsic,
bool &exists) const;
void setDefaultIntrinsic(const RiseFall *rf,
float value);
@ -360,7 +360,7 @@ public:
void setDefaultOcvDerate(OcvDerate *derate);
OcvDerate *makeOcvDerate(std::string_view name);
OcvDerate *findOcvDerate(std::string_view derate_name);
void addSupplyVoltage(std::string_view suppy_name,
void addSupplyVoltage(std::string_view supply_name,
float voltage);
bool supplyExists(std::string_view supply_name) const;
void supplyVoltage(std::string_view supply_name,
@ -374,19 +374,15 @@ public:
static void
makeSceneMap(LibertyLibrary *lib,
int ap_index,
Scene *scene,
const MinMaxAll *min_max,
Network *network,
Report *report);
static void
makeSceneMap(LibertyCell *link_cell,
LibertyCell *map_cell,
int ap_index,
Report *report);
static void
makeSceneMap(LibertyCell *cell1,
LibertyCell *cell2,
bool link,
int ap_index,
LibertyCell *scene_cell,
Scene *scene,
const MinMaxAll *min_max,
Report *report);
static void
checkScenes(LibertyCell *cell,
@ -396,62 +392,66 @@ public:
DriverWaveform *findDriverWaveform(std::string_view name);
DriverWaveform *driverWaveformDefault() { return findDriverWaveform(""); }
DriverWaveform *makeDriverWaveform(std::string_view name,
TablePtr waveforms);
const TablePtr &waveforms);
protected:
float degradeWireSlew(const TableModel *model,
float in_slew,
float wire_delay) const;
Units *units_;
DelayModelType delay_model_type_;
BusDclMap bus_dcls_;
TableTemplateMap template_maps_[table_template_type_count];
float nominal_process_;
float nominal_voltage_;
float nominal_temperature_;
ScaleFactors *scale_factors_;
ScaleFactorsMap scale_factors_map_;
TableModel *wire_slew_degradation_tbls_[RiseFall::index_count];
float default_input_pin_cap_;
float default_output_pin_cap_;
float default_bidirect_pin_cap_;
RiseFallValues default_intrinsic_;
RiseFallValues default_inout_pin_res_;
RiseFallValues default_output_pin_res_;
float default_fanout_load_;
bool default_fanout_load_exists_;
float default_max_cap_;
bool default_max_cap_exists_;
float default_max_fanout_;
bool default_max_fanout_exists_;
float default_max_slew_;
bool default_max_slew_exists_;
float input_threshold_[RiseFall::index_count];
float output_threshold_[RiseFall::index_count];
float slew_lower_threshold_[RiseFall::index_count];
float slew_upper_threshold_[RiseFall::index_count];
float slew_derate_from_library_;
WireloadMap wireloads_;
const Wireload *default_wire_load_;
WireloadMode default_wire_load_mode_;
const WireloadSelection *default_wire_load_selection_;
WireloadSelectionMap wire_load_selections_;
OperatingConditionsMap operating_conditions_;
OperatingConditions *default_operating_conditions_;
float ocv_arc_depth_;
OcvDerate *default_ocv_derate_;
OcvDerateMap ocv_derate_map_;
SupplyVoltageMap supply_voltage_map_;
LibertyCellSeq *buffers_;
LibertyCellSeq *inverters_;
DriverWaveformMap driver_waveform_map_;
static constexpr float input_threshold_default_ = .5;
static constexpr float output_threshold_default_ = .5;
static constexpr float slew_lower_threshold_default_ = .2;
static constexpr float slew_upper_threshold_default_ = .8;
Units *units_{nullptr};
DelayModelType delay_model_type_{DelayModelType::table};
BusDclMap bus_dcls_;
TableTemplateMap template_maps_[table_template_type_count];
float nominal_process_{0.0F};
float nominal_voltage_{0.0F};
float nominal_temperature_{0.0F};
ScaleFactors *scale_factors_{nullptr};
ScaleFactorsMap scale_factors_map_;
TableModel *wire_slew_degradation_tbls_[RiseFall::index_count]{nullptr, nullptr};
float default_input_pin_cap_{0.0F};
float default_output_pin_cap_{0.0F};
float default_bidirect_pin_cap_{0.0F};
RiseFallValues default_intrinsic_;
RiseFallValues default_inout_pin_res_;
RiseFallValues default_output_pin_res_;
float default_fanout_load_{0.0F};
bool default_fanout_load_exists_{false};
float default_max_cap_{0.0F};
bool default_max_cap_exists_{false};
float default_max_fanout_{0.0F};
bool default_max_fanout_exists_{false};
float default_max_slew_{0.0F};
bool default_max_slew_exists_{false};
float input_threshold_[RiseFall::index_count]{input_threshold_default_,
input_threshold_default_};
float output_threshold_[RiseFall::index_count]{output_threshold_default_,
output_threshold_default_};
float slew_lower_threshold_[RiseFall::index_count]{slew_lower_threshold_default_,
slew_lower_threshold_default_};
float slew_upper_threshold_[RiseFall::index_count]{slew_upper_threshold_default_,
slew_upper_threshold_default_};
float slew_derate_from_library_{1.0F};
WireloadMap wireloads_;
const Wireload *default_wire_load_{nullptr};
WireloadMode default_wire_load_mode_{WireloadMode::unknown};
const WireloadSelection *default_wire_load_selection_{nullptr};
WireloadSelectionMap wire_load_selections_;
OperatingConditionsMap operating_conditions_;
OperatingConditions *default_operating_conditions_{nullptr};
float ocv_arc_depth_{0.0F};
OcvDerate *default_ocv_derate_{nullptr};
OcvDerateMap ocv_derate_map_;
SupplyVoltageMap supply_voltage_map_;
LibertyCellSeq *buffers_{nullptr};
LibertyCellSeq *inverters_{nullptr};
DriverWaveformMap driver_waveform_map_;
private:
friend class LibertyCell;
friend class LibertyCellIterator;
@ -476,12 +476,11 @@ public:
LibertyCell(LibertyLibrary *library,
std::string_view name,
std::string_view filename);
virtual ~LibertyCell();
~LibertyCell() override;
LibertyLibrary *libertyLibrary() const { return liberty_library_; }
LibertyLibrary *libertyLibrary() { return liberty_library_; }
LibertyPort *findLibertyPort(std::string_view name) const;
LibertyPortSeq findLibertyPortsMatching(PatternMatch *pattern) const;
bool hasInternalPorts() const { return has_internal_ports_; }
ScaleFactors *scaleFactors() const { return scale_factors_; }
void setScaleFactors(ScaleFactors *scale_factors);
ModeDef *makeModeDef(std::string_view name);
@ -524,7 +523,7 @@ public:
const LibertyPort *to) const;
size_t timingArcSetCount() const;
// Find a timing arc set equivalent to key.
TimingArcSet *findTimingArcSet(TimingArcSet *key) const;
TimingArcSet *findTimingArcSet(TimingArcSet *arc_set) const;
TimingArcSet *findTimingArcSet(size_t index) const;
bool hasTimingArcs(LibertyPort *port) const;
@ -552,7 +551,7 @@ public:
// timing arcs.
bool hasInferedRegTimingArcs() const { return has_infered_reg_timing_arcs_; }
TestCell *testCell() const { return test_cell_; }
void latchEnable(const TimingArcSet *arc_set,
void latchEnable(const TimingArcSet *d_to_q_set,
// Return values.
const LibertyPort *&enable_port,
const FuncExpr *&enable_func,
@ -560,7 +559,7 @@ public:
const RiseFall *latchCheckEnableEdge(TimingArcSet *check_set);
LibertyCell *sceneCell(const Scene *scene,
const MinMax *min_max);
LibertyCell *sceneCell(int ap_index);
LibertyCell *sceneCell(size_t lib_ap_index);
// AOCV
float ocvArcDepth() const;
@ -604,7 +603,7 @@ public:
void setTestCell(TestCell *test);
void setHasInferedRegTimingArcs(bool infered);
void setSceneCell(LibertyCell *scene_cell,
int ap_index);
size_t lib_ap_index);
// Call after cell is finished being constructed.
void finish(bool infer_latches,
Report *report,
@ -623,9 +622,9 @@ public:
void setFootprint(std::string_view footprint);
const std::string &userFunctionClass() const { return user_function_class_; }
void setUserFunctionClass(std::string_view user_function_class);
void addPort(ConcretePort *port) override;
protected:
void addPort(ConcretePort *port);
void setHasInternalPorts(bool has_internal);
void setLibertyLibrary(LibertyLibrary *library);
void makeLatchEnables(Report *report,
@ -661,35 +660,35 @@ protected:
bool checkSceneCell(const Scene *scene,
const MinMax *min_max) const;
LibertyLibrary *liberty_library_;
float area_;
bool dont_use_;
bool is_macro_;
bool is_memory_;
bool is_pad_;
bool is_clock_cell_;
bool is_level_shifter_;
LevelShifterType level_shifter_type_;
bool is_isolation_cell_;
bool always_on_;
SwitchCellType switch_cell_type_;
bool interface_timing_;
ClockGateType clock_gate_type_;
LibertyLibrary *liberty_library_{nullptr};
float area_{0.0F};
bool dont_use_{false};
bool is_macro_{false};
bool is_memory_{false};
bool is_pad_{false};
bool is_clock_cell_{false};
bool is_level_shifter_{false};
LevelShifterType level_shifter_type_{LevelShifterType::HL_LH};
bool is_isolation_cell_{false};
bool always_on_{false};
SwitchCellType switch_cell_type_{SwitchCellType::fine_grain};
bool interface_timing_{false};
ClockGateType clock_gate_type_{ClockGateType::none};
TimingArcSetSeq timing_arc_sets_;
TimingArcSetSet timing_arc_set_set_;
LibertyPortPairTimingArcMap port_timing_arc_set_map_;
bool has_infered_reg_timing_arcs_;
bool has_infered_reg_timing_arcs_{false};
InternalPowerSeq internal_powers_;
PortInternalPowerMap port_internal_powers_;
LeakagePowerSeq leakage_powers_;
SequentialSeq sequentials_;
PortToSequentialMap port_to_seq_map_;
Statetable *statetable_;
Statetable *statetable_{nullptr};
BusDclMap bus_dcls_;
ModeDefMap mode_defs_;
ScaleFactors *scale_factors_;
ScaleFactors *scale_factors_{nullptr};
ScaledCellMap scaled_cells_;
TestCell *test_cell_;
TestCell *test_cell_{nullptr};
// Latch D->Q to LatchEnable index.
LatchEnableIndexMap latch_d_to_q_map_;
// Latch EN->D setup to LatchEnable index.
@ -697,14 +696,14 @@ protected:
LatchEnableSeq latch_enables_;
// Ports that have latch D->Q timing arc sets from them.
LibertyPortSet latch_data_ports_;
float ocv_arc_depth_;
OcvDerate *ocv_derate_;
float ocv_arc_depth_{0.0F};
OcvDerate *ocv_derate_{nullptr};
OcvDerateMap ocv_derate_map_;
std::vector<LibertyCell*> scene_cells_;
float leakage_power_;
bool leakage_power_exists_;
bool has_internal_ports_;
std::atomic<bool> have_voltage_waveforms_;
float leakage_power_{0.0F};
bool leakage_power_exists_{false};
bool has_internal_ports_{false};
std::atomic<bool> have_voltage_waveforms_{false};
std::mutex waveform_lock_;
std::string footprint_;
std::string user_function_class_;
@ -731,7 +730,7 @@ class LibertyCellPortBitIterator : public Iterator<LibertyPort*>
{
public:
LibertyCellPortBitIterator(const LibertyCell *cell);
virtual ~LibertyCellPortBitIterator();
~LibertyCellPortBitIterator() override;
bool hasNext() override;
LibertyPort *next() override;
@ -748,9 +747,7 @@ public:
LibertyLibrary *libertyLibrary() const { return liberty_cell_->libertyLibrary(); }
LibertyPort *findLibertyMember(int index) const;
LibertyPort *findLibertyBusBit(int index) const;
LibertyPort *bundlePort() const;
BusDcl *busDcl() const { return bus_dcl_; }
void setDirection(PortDirection *dir);
////////////////////////////////////////////////////////////////
// pg_pin functions
@ -872,15 +869,15 @@ public:
const RiseFall *pulseClkTrigger() const { return pulse_clk_trigger_; }
// Rise for high, fall for low.
const RiseFall *pulseClkSense() const { return pulse_clk_sense_; }
void setPulseClk(const RiseFall *rfigger,
void setPulseClk(const RiseFall *trigger,
const RiseFall *sense);
LibertyPort *scenePort(const Scene *scene,
const MinMax *min_max);
const LibertyPort *scenePort(const Scene *scene,
const MinMax *min_max) const;
const LibertyPort *scenePort(int ap_index) const;
const LibertyPort *scenePort(size_t lib_ap_index) const;
void setScenePort(LibertyPort *scene_port,
int ap_index);
size_t lib_ap_index);
LibertyPort *relatedGroundPort() const { return related_ground_port_; }
void setRelatedGroundPort(LibertyPort *related_ground_port);
LibertyPort *relatedPowerPort() const { return related_power_port_; }
@ -913,7 +910,7 @@ protected:
int to_index,
bool is_bundle,
ConcretePortSeq *members);
virtual ~LibertyPort();
~LibertyPort() override;
void setMinPort(LibertyPort *min);
void addScaledPort(OperatingConditions *op_cond,
LibertyPort *scaled_port);
@ -927,48 +924,48 @@ protected:
float,
const MinMax *)> &setter);
LibertyPort *scenePort(int ap_index);
LibertyPort *scenePort(size_t lib_ap_index);
LibertyCell *liberty_cell_;
BusDcl *bus_dcl_;
PwrGndType pwr_gnd_type_;
LibertyCell *liberty_cell_{nullptr};
BusDcl *bus_dcl_{nullptr};
PwrGndType pwr_gnd_type_{PwrGndType::none};
std::string voltage_name_;
ScanSignalType scan_signal_type_;
FuncExpr *function_;
FuncExpr *tristate_enable_;
ScaledPortMap *scaled_ports_;
ScanSignalType scan_signal_type_{ScanSignalType::none};
FuncExpr *function_{nullptr};
FuncExpr *tristate_enable_{nullptr};
ScaledPortMap *scaled_ports_{nullptr};
RiseFallMinMax capacitance_;
MinMaxFloatValues slew_limit_; // inputs and outputs
MinMaxFloatValues cap_limit_; // outputs
float fanout_load_; // inputs
bool fanout_load_exists_;
float fanout_load_{0.0F}; // inputs
bool fanout_load_exists_{false};
MinMaxFloatValues fanout_limit_; // outputs
float min_period_;
float min_pulse_width_[RiseFall::index_count];
const RiseFall *pulse_clk_trigger_;
const RiseFall *pulse_clk_sense_;
LibertyPort *related_ground_port_;
LibertyPort *related_power_port_;
float min_period_{0.0F};
float min_pulse_width_[RiseFall::index_count]{0.0F, 0.0F};
const RiseFall *pulse_clk_trigger_{nullptr};
const RiseFall *pulse_clk_sense_{nullptr};
LibertyPort *related_ground_port_{nullptr};
LibertyPort *related_power_port_{nullptr};
std::vector<LibertyPort*> scene_ports_;
ReceiverModelPtr receiver_model_;
DriverWaveform *driver_waveform_[RiseFall::index_count];
ReceiverModelPtr receiver_model_{nullptr};
DriverWaveform *driver_waveform_[RiseFall::index_count]{nullptr, nullptr};
unsigned int min_pulse_width_exists_:RiseFall::index_count;
bool min_period_exists_:1;
bool is_clk_:1;
bool is_reg_clk_:1;
bool is_reg_output_:1;
bool is_latch_data_: 1;
bool is_check_clk_:1;
bool is_clk_gate_clk_:1;
bool is_clk_gate_enable_:1;
bool is_clk_gate_out_:1;
bool is_pll_feedback_:1;
bool isolation_cell_data_:1;
bool isolation_cell_enable_:1;
bool level_shifter_data_:1;
bool is_switch_:1;
bool is_pad_:1;
bool min_pulse_width_exists_:RiseFall::index_count {false};
bool min_period_exists_:1 {false};
bool is_clk_:1 {false};
bool is_reg_clk_:1 {false};
bool is_reg_output_:1 {false};
bool is_latch_data_: 1 {false};
bool is_check_clk_:1 {false};
bool is_clk_gate_clk_:1 {false};
bool is_clk_gate_enable_:1 {false};
bool is_clk_gate_out_:1 {false};
bool is_pll_feedback_:1 {false};
bool isolation_cell_data_:1 {false};
bool isolation_cell_enable_:1 {false};
bool level_shifter_data_:1 {false};
bool is_switch_:1 {false};
bool is_pad_:1 {false};
private:
friend class LibertyLibrary;
@ -984,7 +981,7 @@ class LibertyPortMemberIterator : public Iterator<LibertyPort*>
{
public:
LibertyPortMemberIterator(const LibertyPort *port);
virtual ~LibertyPortMemberIterator();
~LibertyPortMemberIterator() override;
bool hasNext() override;
LibertyPort *next() override;
@ -999,7 +996,7 @@ public:
Pvt(float process,
float voltage,
float temperature);
virtual ~Pvt() {}
virtual ~Pvt() = default;
float process() const { return process_; }
void setProcess(float process);
float voltage() const { return voltage_; }
@ -1023,7 +1020,7 @@ public:
protected:
std::string name_;
WireloadTree wire_load_tree_;
WireloadTree wire_load_tree_{WireloadTree::unknown};
};
class ScaleFactors
@ -1112,7 +1109,7 @@ public:
protected:
std::string name_;
TableTemplateType type_;
TableTemplateType type_{TableTemplateType::delay};
TableAxisPtr axis1_;
TableAxisPtr axis2_;
TableAxisPtr axis3_;
@ -1124,15 +1121,12 @@ public:
TestCell(LibertyLibrary *library,
std::string_view name,
std::string_view filename);
protected:
};
class OcvDerate
{
public:
OcvDerate(std::string_view name);
~OcvDerate();
const std::string &name() const { return name_; }
const Table *derateTable(const RiseFall *rf,
const EarlyLate *early_late,
@ -1153,8 +1147,8 @@ portLibertyToSta(std::string_view port_name);
const std::string &
scanSignalTypeName(ScanSignalType scan_type);
const std::string &
pwrGndTypeName(PwrGndType pwr_gnd_type);
pwrGndTypeName(PwrGndType pg_type);
PwrGndType
findPwrGndType(std::string_view pg_name);
} // namespace
} // namespace sta

View File

@ -24,10 +24,10 @@
#pragma once
#include <memory>
#include <vector>
#include <map>
#include <memory>
#include <set>
#include <vector>
namespace sta {
@ -85,7 +85,7 @@ enum class ScaleFactorType : unsigned {
wire_cap,
wire_res,
min_period,
// Liberty attributes have rise/fall suffix.
// Liberty attributes with rise/fall suffix.
cell,
hold,
setup,
@ -95,13 +95,13 @@ enum class ScaleFactorType : unsigned {
skew,
leakage_power,
internal_power,
// Liberty attributes have rise/fall prefix.
// Liberty attributes with rise/fall prefix.
transition,
// Liberty attributes have low/high suffix (indexed as rise/fall).
// Liberty attributes with low/high suffix (indexed as rise/fall).
min_pulse_width,
unknown,
};
const int scale_factor_type_count = int(ScaleFactorType::unknown) + 1;
const int scale_factor_type_count = static_cast<int>(ScaleFactorType::unknown) + 1;
// Enough bits to hold a ScaleFactorType enum.
const int scale_factor_bits = 4;
@ -116,7 +116,7 @@ enum class TimingSense {
none,
unknown
};
const int timing_sense_count = int(TimingSense::unknown) + 1;
const int timing_sense_count = static_cast<int>(TimingSense::unknown) + 1;
const int timing_sense_bit_count = 3;
enum class TableAxisVariable {
@ -178,4 +178,4 @@ public:
}
};
} // namespace
} // namespace sta

View File

@ -35,4 +35,4 @@ writeLiberty(LibertyLibrary *lib,
const char *filename,
StaState *sta);
} // namespace
} // namespace sta

View File

@ -55,10 +55,9 @@ public:
PocvMode pocv_mode,
int digits) const override;
float driveResistance(const Pvt *pvt) const override;
protected:
void setIsScaled(bool is_scaled) override;
protected:
float intrinsic_;
float resistance_;
};
@ -82,11 +81,10 @@ public:
const MinMax *min_max,
PocvMode pocv_mode,
int digits) const override;
protected:
void setIsScaled(bool is_scaled) override;
protected:
float intrinsic_;
};
} // namespace
} // namespace sta

View File

@ -26,11 +26,6 @@
// This header contains global os/port specific definitions.
// Pragma placeholder for non-gcc compilers.
#ifndef __GNUC__
#define __attribute__(x)
#endif // __GNUC__
#ifdef _MSC_VER
// Microcruft Visual C++
// Obtuse warning codes enabled by pragma.
@ -48,6 +43,7 @@
// 4611 = setjmp used in C++ function
// 4701 = variable used but not initialized
#pragma warning( 3 : 4018 4032 4132 4189 4201 4222 4234 4505 4611 4701 )
// Disable security warnings for posix functions.
// _CRT_SECURE_NO_WARNINGS does not seem to work
#pragma warning( disable : 4996 )
@ -65,7 +61,7 @@
// Flex doesn't check for unistd.h.
#define YY_NO_UNISTD_H
namespace sta {
int vsnprint(char *str, size_t size, const char *fmt, va_list args);
int vsnprint(char *str, size_t size, const char *fmt, const va_list args);
int vasprintf(char **str, const char *fmt, va_list args);
}
#else

View File

@ -31,4 +31,4 @@ class NetworkReader;
NetworkReader *
makeConcreteNetwork();
} // namespace
} // namespace sta

View File

@ -25,8 +25,8 @@
#pragma once
#include <array>
#include <vector>
#include <string>
#include <vector>
#include "Iterator.hh"
@ -52,12 +52,12 @@ public:
static const MinMax *max() { return &max_; }
static const EarlyLate *early() { return &min_; }
static const EarlyLate *late() { return &max_; }
static int minIndex() { return min_.index_; }
static int earlyIndex() { return min_.index_; }
static int maxIndex() { return max_.index_; }
static int lateIndex() { return max_.index_; }
static size_t minIndex() { return min_.index_; }
static size_t earlyIndex() { return min_.index_; }
static size_t maxIndex() { return max_.index_; }
static size_t lateIndex() { return max_.index_; }
const std::string &to_string() const { return name_; }
int index() const { return index_; }
size_t index() const { return index_; }
float initValue() const { return init_value_; }
int initValueInt() const { return init_value_int_; }
// Max value1 > value2, Min value1 < value2.
@ -72,18 +72,18 @@ public:
// for (auto min_max : MinMax::range()) {}
static const std::array<const MinMax*, 2> &range() { return range_; }
// for (auto mm_index : MinMax::rangeIndex()) {}
static const std::array<int, 2> &rangeIndex() { return range_index_; }
static const std::array<size_t, 2> &rangeIndex() { return range_index_; }
// Find MinMax from name.
static const MinMax *find(const char *min_max);
static const MinMax *find(std::string_view min_max);
// Find MinMax from index.
static const MinMax *find(int index);
static const int index_max = 1;
static const int index_count = 2;
static const int index_bit_count = 1;
static const MinMax *find(size_t index);
static const size_t index_max = 1;
static const size_t index_count = 2;
static const size_t index_bit_count = 1;
private:
MinMax(const char *name,
int index,
MinMax(std::string_view name,
size_t index,
float init_value,
int init_value_int,
bool (*compare)(float value1,
@ -99,7 +99,7 @@ private:
static const MinMax min_;
static const MinMax max_;
static const std::array<const MinMax*, 2> range_;
static const std::array<int, 2> range_index_;
static const std::array<size_t, 2> range_index_;
};
// Min/Max/All, where "All" means use both min and max.
@ -114,7 +114,7 @@ public:
static const MinMaxAll *all() { return &all_; }
static const MinMaxAll *minMax() { return &all_; }
const std::string &to_string() const { return name_; }
int index() const { return index_; }
size_t index() const { return index_; }
const MinMax *asMinMax() const;
bool matches(const MinMax *min_max) const;
bool matches(const MinMaxAll *min_max) const;
@ -122,22 +122,22 @@ public:
// for (const auto min_max : min_max->range()) {}
const std::vector<const MinMax*> &range() const { return range_; }
// for (const auto mm_index : min_max->rangeIndex()) {}
const std::vector<int> &rangeIndex() const { return range_index_; }
const std::vector<size_t> &rangeIndex() const { return range_index_; }
private:
MinMaxAll(const char *name,
int index,
std::vector<const MinMax*> range,
std::vector<int> range_index);
MinMaxAll(std::string_view name,
size_t index,
const std::vector<const MinMax*> &range,
const std::vector<size_t> &range_index);
const std::string name_;
int index_;
size_t index_;
const std::vector<const MinMax*> range_;
const std::vector<int> range_index_;
const std::vector<size_t> range_index_;
static const MinMaxAll min_;
static const MinMaxAll max_;
static const MinMaxAll all_;
};
} // namespace
} // namespace sta

View File

@ -24,8 +24,8 @@
#pragma once
#include "MinMax.hh"
#include "Error.hh"
#include "MinMax.hh"
namespace sta {
@ -200,4 +200,4 @@ private:
using MinMaxFloatValues = MinMaxValues<float>;
using MinMaxIntValues = MinMaxValues<int>;
} // namespace
} // namespace sta

View File

@ -39,21 +39,22 @@ class PathGroups;
using PathGroupSeq = std::vector<PathGroup*>;
// Sdc and dependent state.
class Mode : public StaState
class Mode
{
public:
Mode(std::string_view name,
size_t mode_index,
StaState *sta);
virtual ~Mode();
virtual void copyState(const StaState *sta);
~Mode();
void copyState(const StaState *sta);
void clear();
const std::string &name() const { return name_; }
size_t modeIndex() const { return mode_index_; }
const SceneSeq &scenes() const { return scenes_; }
const SceneSet sceneSet() const;
SceneSet sceneSet() const;
void addScene(Scene *scene);
void removeScene(Scene *scene);
StaState *sta() const { return sta_; }
Sdc *sdc() { return sdc_; }
Sdc *sdc() const { return sdc_; }
Sim *sim() { return sim_; }
@ -69,8 +70,8 @@ public:
int endpoint_path_count,
bool unique_pins,
bool unique_edges,
float min_slack,
float max_slack,
float slack_min,
float slack_max,
StringSeq &group_names,
bool setup,
bool hold,
@ -89,7 +90,8 @@ private:
Sim *sim_;
ClkNetwork *clk_network_;
Genclks *genclks_;
PathGroups *path_groups_;
PathGroups *path_groups_{nullptr};
StaState *sta_;
};
} // namespace
} // namespace sta

View File

@ -29,6 +29,6 @@
namespace sta {
// Hide a bit of the std verbosity.
using LockGuard = std::lock_guard<std::mutex>;
using LockGuard = std::scoped_lock<std::mutex>;
} // namespace
} // namespace sta

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